Cypress Semiconductor CY8C21234 Скачать руководство пользователя страница 23

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CY8C21634, CY8C21534

CY8C21434, CY8C21334, CY8C21234

Document Number: 38-12025 Rev. *O

Page 23 of 45

Figure 15. Basic Switch Mode Pump Circuit

PUMP_

Line

Line Regulation (over Vi range)

–

Configuration of footnote.

[6]

is the “Vdd Value for PUMP

Trip” specified by the VM[2:0]

setting in the DC POR and LVD

Specification,

Table 23

on page

24.

PUMP_

Load

Load Regulation

–

Configuration of footnote.

[6]

is the “Vdd Value for PUMP

Trip” specified by the VM[2:0]

setting in the DC POR and LVD

Specification,

Table 23

on page

24.

PUMP_

Ripple

Output Voltage Ripple (depends on cap/load)

–

100

–

mVpp

Configuration of footnote.

[6]

Load is 5 mA.

Efficiency

–

Configuration of footnote.

[6]

Load is 5 mA. SMP trip voltage

is set to 3.25V.

Efficiency

–

For I load = 1mA, V

PUMP

2.55V, V

BAT

= 1.3V,

10 uH inductor, 1 uF capacitor,

and Schottky diode.

PUMP

Switching Frequency

–

1.3

–

MHz

PUMP

Switching Duty Cycle

–

Table 21. DC Switch Mode Pump (SMP) Specifications

(continued)

Symbol

Description

Min

Typ

Max

Units

Notes

Battery

PSoC

Vdd

Vss

SMP

BAT

PUMP

Note

6. L

= 2 mH inductor, C

= 10 mF capacitor, D

= Schottky diode. See Figure 15

[+] Feedback

Содержание CY8C21234

Страница 1: ...m Storage 50 000 Erase Write Cycles 512 Bytes SRAM Data Storage In System Serial Programming ISSP Partial Flash Updates Flexible Protection Modes EEPROM Emulation in Flash Complete Development Tools F...

Страница 2: ...an absolute value of 1 3V to a number of PSoC subsystems A switch mode pump SMP that generates normal operating voltages off a single battery cell Various system resets supported by the M8C The Digita...

Страница 3: ...nuously under hardware control This enables capacitive measurement for applications such as touch sensing Other multiplexer applications include Track pad finger sensing Chip wide mux that allows anal...

Страница 4: ...ing number of regional and global distributors which include Arrow Avnet Digi Key Farnell Future Electronics and Newark Training Free PSoC technical training on demand webinars and workshops is availa...

Страница 5: ...rces All views of the project share a common code editor builder and common debug emulation and programming tools Code Generation Tools PSoC Designer supports multiple third party C compilers and asse...

Страница 6: ...ch user module parameter or driver property and other information you may need to successfully implement your design Organize and Connect You can build signal chains at the chip level by interconnecti...

Страница 7: ...h b or 0x are decimal Table 2 Acronyms Used Acronym Description AC alternating current ADC analog to digital converter API application programming interface CPU central processing unit CT continuous t...

Страница 8: ...6 7 8 A I M P0 7 A I M P0 5 A I M P0 3 A I M P0 1 SMP Vss M I2CSCL P1 1 Vss 10 9 Table 3 Pin Definitions CY8C21234 16 Pin SOIC Pin No Type Name Description Digital Analog 1 IO I M P0 7 Analog column...

Страница 9: ...log column mux input 3 IO I M P0 3 Analog column mux input integrating input 4 IO I M P0 1 Analog column mux input integrating input 5 Power Vss Ground connection 6 IO M P1 7 I2C Serial Clock SCL 7 IO...

Страница 10: ...ut 4 IO I M P0 1 Analog column mux input integrating input 5 IO M P2 7 6 IO M P2 5 7 IO I M P2 3 Direct switched capacitor block input 8 IO I M P2 1 Direct switched capacitor block input 9 Power Vss G...

Страница 11: ...M P1 2 M EXTCLK P1 4 M P1 6 P2 4 M P2 2 M P2 0 M P3 2 M P0 5 A I M Figure 6 CY8C21434 32 Pin PSoC Device Figure 9 CY8C21634 32 Pin PSoC Device A I M P0 1 M P2 7 M P2 5 M P2 3 M P2 1 M P3 3 QFN Top Vi...

Страница 12: ...Data SDA ISSP SDATA 3 14 IO M P1 2 15 IO M P1 4 Optional External Clock Input EXTCLK 16 IO M P1 6 17 Input XRES Active high external reset with internal pull down 18 IO M P3 0 19 IO M P3 2 20 IO M P2...

Страница 13: ...ect switched capacitor block input 9 IO I P2 1 Direct switched capacitor block input 10 NC No connection 11 NC No connection 12 NC No connection 13 NC No connection 14 OCD OCDE OCD even data IO 15 OCD...

Страница 14: ...C No connection 36 NC No connection 37 NC No connection 38 NC No connection 39 NC No connection 40 NC No connection 41 Input XRES Active high external reset with internal pull down 42 OCD HCLK OCD hig...

Страница 15: ...bit s W Write register or bit s L Logical register or bit s C Clearable register or bit s Access is bit specific Table 9 Register Map 0 Table User Space Name Addr 0 Hex Access Name Addr 0 Hex Access...

Страница 16: ...8 B8 F8 39 79 B9 F9 3A 7A BA FA 3B 7B BB FB 3C 7C BC FC 3D 7D BD DAC_D FD RW 3E 7E BE CPU_SCR1 FE 3F 7F BF CPU_SCR0 FF Table 9 Register Map 0 Table User Space continued Name Addr 0 Hex Access Name Add...

Страница 17: ...8 A8 IMO_TR E8 W DCB02IN 29 RW 69 A9 ILO_TR E9 W DCB02OU 2A RW 6A AA BDG_TR EA RW 2B CLK_CR3 6B RW AB ECO_TR EB W DCB03FN 2C RW TMP_DR0 6C RW AC EC DCB03IN 2D RW TMP_DR1 6D RW AD ED DCB03OU 2E RW TMP_...

Страница 18: ...degree Celsius W microwatts dB decibels mA milli ampere fF femto farad ms milli second Hz hertz mV milli volts KB 1024 bytes nA nanoampere Kbit 1024 bits ns nanosecond kHz kilohertz nV nanovolts k kil...

Страница 19: ...5 Vdd 0 5 V VIOZ DC Voltage Applied to Tri state Vss 0 5 Vdd 0 5 V IMIO Maximum Current into any Port Pin 25 50 mA ESD Electro Static Discharge Voltage 2000 V Human Body Model ESD LU Latch up Current...

Страница 20: ...p Max Units Notes Table 15 5V and 3 3V DC GPIO Specifications Symbol Description Min Typ Max Units Notes RPU Pull up Resistor 4 5 6 8 k RPD Pull down Resistor 4 5 6 8 k VOH High Output Level Vdd 1 0 V...

Страница 21: ...Specifications Symbol Description Min Typ Max Units Notes VOSOA Input Offset Voltage absolute value 2 5 15 mV TCVOSOA Average Input Offset Voltage Drift 10 V oC IEBOA 5 Input Leakage Current Port 0 A...

Страница 22: ...DC Low Power Comparator Specifications Symbol Description Min Typ Max Units Notes VREFLPC Low power comparator LPC reference voltage range 0 2 Vdd 1 V ISLPC LPC supply current 10 40 A VOSLPC LPC volta...

Страница 23: ...g in the DC POR and LVD Specification Table 23 on page 24 VPUMP_ Ripple Output Voltage Ripple depends on cap load 100 mVpp Configuration of footnote 6 Load is 5 mA E3 Efficiency 35 50 Configuration of...

Страница 24: ...Table 23 DC POR and LVD Specifications Symbol Description Min Typ Max Units Notes VPPOR0 VPPOR1 VPPOR2 Vdd Value for PPOR Trip PORLEV 1 0 00b PORLEV 1 0 01b PORLEV 1 0 10b 2 36 2 82 4 55 2 40 2 95 4 7...

Страница 25: ...IIHP Input Current when Applying Vihp to P1 0 or P1 1 During Programming or Verify 1 5 mA Driving internal pull down resistor VOLV Output Low Voltage During Programming or Verify Vss 0 75 V VOHV Outp...

Страница 26: ...4 MHz only for SLIMO mode 0 FCPU2 CPU Frequency 3 3V Nominal 0 93 12 12 3 13 14 MHz FBLK5 Digital PSoC Block Frequency0 5V Nominal 0 48 49 2 12 13 15 MHz Refer to the AC Digital Block Specifications F...

Страница 27: ...SLIMO mode 1 FCPU1 CPU Frequency 2 7V Nominal 0 093 3 3 15 16 17 MHz 24 MHz only for SLIMO mode 0 FBLK27 Digital PSoC Block Frequency 2 7V Nominal 0 12 12 5 16 17 18 MHz Refer to the AC Digital Block...

Страница 28: ...ble 27 5V and 3 3V AC GPIO Specifications Symbol Description Min Typ Max Units Notes FGPIO GPIO Operating Frequency 0 12 MHz Normal Strong Mode TRiseF Rise Time Normal Strong Mode Cload 50 pF 3 18 ns...

Страница 29: ...Timer Capture Pulse Width 50 19 ns Maximum Frequency No Capture 49 2 MHz 4 75V Vdd 5 25V Maximum Frequency With or Without Capture 24 6 MHz Counter Enable Pulse Width 50 ns Maximum Frequency No Enable...

Страница 30: ...MHz Dead Band Kill Pulse Width Asynchronous Restart Mode 20 ns Synchronous Restart Mode 100 ns Disable Mode 100 ns Maximum Frequency 12 7 MHz CRCPRS PRS Mode Maximum Input Clock Frequency 12 7 MHz CR...

Страница 31: ...met High Period with CPU Clock divide by 1 41 7 5300 ns Low Period with CPU Clock divide by 1 41 7 ns Power Up IMO to Switch 150 s Table 36 2 7V AC External Clock Specifications Symbol Description Min...

Страница 32: ...ode Units Min Max Min Max FSCLI2C SCL Clock Frequency 0 100 0 400 kHz THDSTAI2C Hold Time repeated START Condition After this period the first clock pulse is generated 4 0 0 6 s TLOWI2C LOW Period of...

Страница 33: ...ed START Condition After this period the first clock pulse is generated 4 0 s TLOWI2C LOW Period of the SCL Clock 4 7 s THIGHI2C HIGH Period of the SCL Clock 4 0 s TSUSTAI2C Set up Time for a Repeated...

Страница 34: ...e document titled PSoC Emulator Pod Dimensions at http www cypress com design MR10161 Packaging Dimensions Figure 20 16 Pin 150 Mil SOIC Figure 21 20 Pin 210 MIL SSOP PIN 1 ID 0 8 1 8 9 16 SEATING PLA...

Страница 35: ...C21434 CY8C21334 CY8C21234 Document Number 38 12025 Rev O Page 35 of 45 Figure 22 28 Pin 210 Mil SSOP Figure 23 32 Pin 5x5 mm 0 93 MAX QFN 51 85079 C 51 85188 B E PAD X Y for this product is 3 53 mm 3...

Страница 36: ...4 CY8C21234 Document Number 38 12025 Rev O Page 36 of 45 Figure 24 32 Pin 5x5 mm 0 60 MAX QFN Figure 25 32 Pin 5 X 5 X 0 4MM QFN SAWN 1 85 X 2 85 EPAD E PAD X Y for this product is 3 53 mm 3 53 mm 0 1...

Страница 37: ...f 45 Figure 26 32 Pin Sawn QFN Package Figure 27 32 Pin Thin Sawn QFN Package Important Note For information on the preferred dimensions for mounting QFN packages see the following Application Note at...

Страница 38: ...gure 28 56 Pin 300 Mil SSOP Thermal Impedances 51 85062 C Table 40 Thermal Impedances per Package Package Typical JA 22 Typical JC 16 SOIC 123 oC W 55 oC W 20 SSOP 117 oC W 41 oC W 28 SSOP 96 oC W 39...

Страница 39: ...e 24 Maximum Peak Temperature 16 SOIC 240oC 260oC 20 SSOP 240oC 260oC 28 SSOP 240oC 260oC 32 QFN 240oC 260oC Notes 22 TJ TA Power x JA 23 To achieve the thermal impedance specified for the QFN package...

Страница 40: ...nd development with PSoC Designer This kit supports in circuit emulation and the software interface allows users to run halt and single step the processor and view the content of specific memory locat...

Страница 41: ...USB 2 0 Cable CY3207ISSP In System Serial Programmer ISSP The CY3207ISSP is a production programmer It includes protection circuitry and an industrial case that is more robust than the MiniProg in a...

Страница 42: ...5 C 4 4 28 28 27 0 Yes 32 Pin 5x5 mm 0 60 MAX QFN 28 Tape and Reel CY8C21434 24LKXIT 8K 512 No 40 C to 85 C 4 4 28 28 27 0 Yes 32 Pin 5x5 mm 0 93 MAX QFN 28 CY8C21634 24LFXI 8K 512 Yes 40 C to 85 C 4...

Страница 43: ...ode Definitions CY 8 C 21 xxx 24xx Package Type Thermal Rating PX PDIP Pb Free C Commercial SX SOIC Pb Free I Industrial PVX SSOP Pb Free E Extended LFX LKX QFN Pb Free AX TQFP Pb Free Speed 24 MHz Pa...

Страница 44: ...to Thermal Impedance table Fix 20 pin package order number Add CY logo Update CY copyright G 352736 HMT See ECN Add new color and logo Add URL to preferred dimensions for mounting MLF packages Update...

Страница 45: ...grants to licensee a personal non exclusive non transferable license to copy use modify create derivative works of and compile the Cypress Source Code and derivative works for the sole purpose of cre...

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