background image

CY7C1339G

Document #: 38-05520 Rev. *F

Page 8 of 18

Maximum Ratings

(Above which the useful life may be impaired. For user guide-
lines, not tested.)

Storage Temperature  ................................. –65°C to +150°C

Ambient Temperature with
Power Applied............................................. –55°C to +125°C

Supply Voltage on V

DD

 Relative to GND........ –0.5V to +4.6V

Supply Voltage on V

DDQ

 Relative to GND ...... –0.5V to +V

DD

DC Voltage Applied to Outputs
in tri-state ............................................ –0.5V to V

DDQ

 + 0.5V

DC Input Voltage ................................... –0.5V to V

DD

 + 0.5V

Current into Outputs (LOW)......................................... 20 mA

Static Discharge Voltage..........................................  > 2001V
(per MIL-STD-883, Method 3015)

Latch-up Current....................................................  > 200 mA

Operating Range

Range

Ambient

Temperature

V

DD

V

DDQ

Commercial

0°C to +70°C 

3.3V

 

–5%/+10%

2.5V –5% 

to

 

V

DD

Industrial

–40°C to +85°C 

Automotive

–40°C to +125°C 

Electrical Characteristics 

Over the Operating Range

[9, 10]

Parameter

Description

Test Conditions

Min.

Max.

Unit

V

DD

Power Supply Voltage

3.135

3.6

V

V

DDQ

I/O Supply Voltage

2.375

V

DD

V

V

OH

Output HIGH Voltage

for 3.3V I/O, I

OH 

= –4.0 mA

2.4

V

for 2.5V I/O, I

OH 

= –1.0 mA

2.0

V

V

OL

Output LOW Voltage

for 3.3V I/O, I

OL 

= 8.0 mA

0.4

V

for 2.5V I/O, I

OL 

= 1.0 mA

0.4

V

V

IH

Input HIGH Voltage

[9]

for 3.3V I/O

2.0

V

DD

 + 0.3V

V

for 2.5V I/O

1.7

V

DD

 + 0.3V

V

V

IL

Input LOW Voltage

[9]

for 3.3V I/O

–0.3

0.8

V

for 2.5V I/O

–0.3

0.7

V

I

X

Input Leakage Current 
except ZZ and MODE

GND 

 V

I

 

 V

DDQ

–5

5

µ

A

Input Current of MODE Input = V

SS

–30

µ

A

Input = V

DD

5

µ

A

Input Current of ZZ

Input = V

SS

–5

µ

A

Input = V

DD

30

µ

A

I

OZ

Output Leakage Current GND 

 V

I

 

 V

DDQ, 

Output Disabled

–5

5

µ

A

I

DD

V

DD

 Operating Supply 

Current

V

DD 

= Max., I

OUT 

= 0 mA,

f = f

MAX

 = 1/t

CYC

4-ns cycle, 250 MHz

325

mA

5-ns cycle, 200 MHz

265

mA

6-ns cycle, 166 MHz

240

mA

7.5-ns cycle, 133 MHz

225

mA

I

SB1

Automatic CE 
Power-down 
Current—TTL Inputs

V

DD 

= Max, Device Deselected, 

V

IN

 

 V

IH

 or V

IN

 

 V

IL

f = f

MAX

 = 1/t

CYC

4-ns cycle, 250 MHz

120

mA

5-ns cycle, 200 MHz

110

mA

6-ns cycle, 166 MHz

100

mA

Industrial/

Commercial

7.5-ns cycle, 133 MHz

90

mA

Automotive 7.5-ns cycle, 133 MHz

115

mA

I

SB2

Automatic CE
Power-down 
Current—CMOS Inputs

V

DD 

= Max, Device Deselected, 

V

IN

 0.3V or V

IN

 > V

DDQ

 – 0.3V, 

f = 0

All speeds

40

mA

Notes: 

9. Overshoot: V

IH

(AC) < V

DD

 +1.5V (Pulse width less than t

CYC

/2), undershoot: V

IL

(AC) > –2V (Pulse width less than t

CYC

/2).

10. TPower-up: Assumes a linear ramp from 0V to V

DD

(min.) within 200 ms. During this time V

IH

 < V

DD

 and V

DDQ 

< V

DD

.

[+] Feedback 

Содержание CY7C1339G

Страница 1: ...Write GW Asynchronous inputs include the Output Enable OE and the ZZ pin Addresses and chip enables are registered at rising edge of clock when either Address Strobe Processor ADSP or Address Strobe...

Страница 2: ...A DQA DQA DQA VSSQ VDDQ DQA DQA NC NC DQC DQC VDDQ VSSQ DQC DQC DQC DQC VSSQ VDDQ DQC DQC NC VDD NC VSS DQD DQD VDDQ VSSQ DQD DQD DQD DQD VSSQ VDDQ DQD DQD NC A A CE 1 CE 2 BW D BW C BW B BW A CE 3 V...

Страница 3: ...sampled only when a new external address is loaded CE2 Input Synchronous Chip Enable 2 Input active HIGH Sampled on the rising edge of CLK Used in conjunction with CE1 and CE3 to select deselect the d...

Страница 4: ...tate to a selected state its outputs are always tri stated during the first cycle of the access After the first cycle of the access the outputs are controlled by the OE ADV Input Synchronous Advance I...

Страница 5: ...s conducted the data presented to the DQs is written into the corresponding address location in the memory core If a Byte Write is conducted only the selected bytes are written Bytes not selected duri...

Страница 6: ...X X X L H H H H L L H Q READ Cycle Suspend Burst Current X X X L H H H H H L H Tri State READ Cycle Suspend Burst Current H X X L X H H H L L H Q READ Cycle Suspend Burst Current H X X L X H H H H L H...

Страница 7: ...rite Bytes C B H L H L L H Write Bytes C B A H L H L L L Write Byte D DQD H L L H H H Write Bytes D A H L L H H L Write Bytes D B H L L H L H Write Bytes D B A H L L H L L Write Bytes D C H L L L H H...

Страница 8: ...V for 2 5V I O IOL 1 0 mA 0 4 V VIH Input HIGH Voltage 9 for 3 3V I O 2 0 VDD 0 3V V for 2 5V I O 1 7 VDD 0 3V V VIL Input LOW Voltage 9 for 3 3V I O 0 3 0 8 V for 2 5V I O 0 3 0 7 V IX Input Leakage...

Страница 9: ...Junction to Ambient Test conditions follow standard test methods and procedures for measuring thermal impedance per EIA JESD51 30 32 34 1 C W JC Thermal Resistance Junction to Case 6 85 14 0 C W AC T...

Страница 10: ...1 5 1 5 ns Hold Times tAH Address Hold After CLK Rise 0 3 0 5 0 5 0 5 ns tADH ADSP ADSC Hold After CLK Rise 0 3 0 5 0 5 0 5 ns tADVH ADV Hold After CLK Rise 0 3 0 5 0 5 0 5 ns tWEH GW BWE BWX Hold Af...

Страница 11: ...CE3 is HIGH tCYC t CL CLK ADSP t ADH t ADS ADDRESS t CH OE ADSC CE tAH tAS A1 tCEH tCES GW BWE BW A D Data Out Q High Z tCLZ tDOH tCO ADV tOEHZ tCO Single READ BURST READ tOEV tOELZ tCHZ ADV suspends...

Страница 12: ...ADS ADDRESS tCH OE ADSC CE tAH tAS A1 tCEH tCES BWE BW A D Data Out Q High Z ADV BURST READ BURST WRITE D A2 D A2 1 D A2 1 D A1 D A3 D A3 1 D A3 2 D A2 3 A2 A3 Data In D Extended BURST WRITE D A2 2 Si...

Страница 13: ...ed by ADSP or ADSC 21 GW is HIGH Switching Waveforms continued tCYC tCL CLK ADSP tADH tADS ADDRESS tCH OE ADSC CE tAH tAS A2 tCEH tCES BWE BW A D Data Out Q High Z ADV Single WRITE D A3 A4 A5 A6 D A5...

Страница 14: ...entering ZZ mode See Cycle Descriptions table for all possible signal conditions to deselect the device 23 DQs are in high Z when exiting ZZ sleep mode Switching Waveforms continued t ZZ I SUPPLY CLK...

Страница 15: ...39G 166BGXC 119 ball Ball Grid Array 14 x 22 x 2 4 mm Lead Free CY7C1339G 166AXI 51 85050 100 pin Thin Quad Flat Pack 14 x 20 x 1 4 mm Lead Free Industrial CY7C1339G 166BGI 51 85115 119 ball Ball Grid...

Страница 16: ...IONS IN MILLIMETERS BODY LENGTH DIMENSIONS ARE MAX PLASTIC BODY SIZE INCLUDING MOLD MISMATCH 0 30 0 08 0 65 20 00 0 10 22 00 0 20 1 40 0 05 12 1 1 60 MAX 0 05 MIN 0 60 0 15 0 MIN 0 25 0 7 8X STAND OFF...

Страница 17: ...al components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress products in life support systems ap...

Страница 18: ...ormation by shading and unshading MPNs as per availability C 351194 See ECN PCI Updated Ordering Information Table D 366728 See ECN PCI Added VDD VDDQ test conditions in DC Table Modified test conditi...

Отзывы: