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CY14B101K

Document Number: 001-06401 Rev. *I

Page 25 of 28

Package Diagrams

Figure 17. 48-Pin Shrunk Small Outline Package (51-85061)

51-85061-*C

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Содержание CY14B101K

Страница 1: ...package ROHS compliant Functional Description The Cypress CY14B101K combines a 1 Mbit nonvolatile static RAM with a full featured real time clock in a monolithic integrated circuit The embedded nonvo...

Страница 2: ...nconnected if VRTCbat is used VRTCbat Power Supply Battery Supplied Backup RTC Supply Voltage Left unconnected if VRTCcap is used INT Output Interrupt Output Program to respond to the clock alarm the...

Страница 3: ...W AutoStore Operation The CY14B101K stores data to nvSRAM using one of three storage operations 1 Hardware Store activated by HSB 2 Software Store activated by an address sequence 3 AutoStore on devic...

Страница 4: ...D 4 Read Address 0x7C1F Valid READ 5 Read Address 0x703F Valid READ 6 Read Address 0x8FC0 Initiate STORE cycle The software sequence is clocked with CE controlled READs or OE controlled READs After th...

Страница 5: ...ality assurance Incoming inspection routines at customer or contract manufacturer s sites sometimes reprograms these values Final NV patterns are typically repeating patterns of AA 55 00 FF A5 or 5A T...

Страница 6: ...t Data Output Data Output High Z Active ICC2 1 2 3 L H L 0x4E38 0xB1C7 0x83E0 0x7C1F 0x703F 0x4C63 Read SRAM Read SRAM Read SRAM Read SRAM Read SRAM Nonvolatile RECALL Output Data Output Data Output D...

Страница 7: ...low VSWITCH the device switches to the backup power supply The clock oscillator uses very little current to maximize the backup time available from the backup source Regardless of clock operation with...

Страница 8: ...h of these fields has a match bit that is used to determine if the field is used in the alarm match logic Setting the match bit to 0 indicates that the corresponding field is used in the match process...

Страница 9: ...to a host microcontroller The control bits are summarized in the following section Interrupt Register Watchdog Interrupt Enable WIE When set to 1 the watchdog timer drives the INT pin and an internal...

Страница 10: ...el H L High Low Enable Watchdog Timer Power Monitor Clock Alarm VINT WDF WIE PF PFE AF AIE P L Pin Driver H L INT VCC VSS C 1 C 2 RF Y 1 X1 X2 A0 A1 A2 A3 DQ0 Recommended Values Y1 32 768KHz RF 10M Oh...

Страница 11: ...N 0 0 Cal Sign 0 Calibration 00000 Calibration Values 7 0x1FFF7 WDS 0 WDW 0 WDT 000000 Watchdog 7 0x1FFF6 WIE 0 AIE 0 PFE 0 0 H L 1 P L 0 0 0 Interrupts 7 0x1FFF5 M 1 0 10s Alarm Date Alarm Day Alarm...

Страница 12: ...r 0x1FFFC Time Keeping Day D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 Day of Week Lower nibble three bits contains a value that correlates to day of the week Day of the week is a ring counter that counts from...

Страница 13: ...31 25 ms The range of timeout value is 31 25 ms a setting of 1 to 2 seconds setting of 3 Fh Setting the watchdog timer register to 0 disables the timer These bits can be written only if the WDW bit w...

Страница 14: ...being reset by the user It is cleared to 0 when the Flags register is read or on power up AF Alarm Flag This read only bit is set to 1 when the time and date match the values stored in the alarm regi...

Страница 15: ...btained without output loads IOUT 0 mA Commercial 65 55 50 mA mA Industrial 70 60 55 mA mA ICC2 Average VCC Current during STORE All Inputs Do Not Care VCC Max Average current for duration tSTORE 6 mA...

Страница 16: ...al Resistance These parameters are guaranteed but not tested Parameter Description Test Conditions 48 SSOP Unit JA Thermal Resistance junction to ambient Test conditions follow standard test methods a...

Страница 17: ...to Output Inactive 10 13 15 ns tLZOE 13 tGLQX Output Enable to Output Active 0 0 0 ns tHZOE 13 tGHQZ Output Disable to Output Inactive 10 13 15 ns tPU 14 tELICCH Chip Enable to Power Active 0 0 0 ns...

Страница 18: ...Write 20 25 30 ns tSA tAVWL tAVEL Address Setup to Start of Write 0 0 0 ns tHA tWHAX tEHAX Address Hold After End of Write 0 0 0 ns tHZWE 13 16 tWLQZ Write Enable to Output Disable 10 13 15 ns tLZWE 1...

Страница 19: ...65 V tVCCRISE VCC Rise Time 150 s Figure 12 AutoStore Power Up RECALL VCC VSWITCH tSTORE tSTORE tHRECALL tHRECALL AutoStore POWER UP RECALL Read Write Inhibited STORE occurs only if a SRAM write has...

Страница 20: ...s Figure 13 CE Controlled Software STORE RECALL Cycle 22 Figure 14 OE Controlled Software STORE RECALL Cycle 22 tRC tRC tSA tSCE tHA tSTORE tRECALL DATA VALID DATA VALID 6 S S E R D D A 1 S S E R D D...

Страница 21: ...e 70 s Figure 16 Soft Sequence Processing 22 24 W W6725 W W 7 9 7 9 03 1 03 1 6 1 4 7 287 6 287 W3 6 GGUHVV GGUHVV GGUHVV GGUHVV 6RIW 6HTXHQFH RPPDQG W66 W66 GGUHVV 9 W6 W 6RIW 6HTXHQFH RPPDQG W Notes...

Страница 22: ...ime to Start At Min Temperature from Power up or Enable 10 sec At 25 C Temperature from Power up or Enable 5 sec Truth Table For SRAM Operations HSB should remain HIGH for SRAM Operations CE WE OE Inp...

Страница 23: ...n T Tape and Reel Blank Std Speed 25 25 ns Data Bus K x8 RTC Density 101 1 Mb Voltage B 3 0V Cypress NVSRAM 14 AutoStore Software Store Hardware Store Package SP 48 SSOP 35 35 ns Temperature C Commerc...

Страница 24: ...ckage Type Operating Range 25 CY14B101K SP25XC 51 85061 48 pin SSOP Commercial CY14B101K SP25XCT CY14B101K SP25XI 51 85061 48 pin SSOP Industrial CY14B101K SP25XIT 35 CY14B101K SP35XC 51 85061 48 pin...

Страница 25: ...CY14B101K Document Number 001 06401 Rev I Page 25 of 28 Package Diagrams Figure 17 48 Pin Shrunk Small Outline Package 51 85061 51 85061 C Feedback...

Страница 26: ...ure spec to Data Retention 20 years at 55 C Removed Icc1 values from the DC table for 25 ns and 35 ns Industrial Grade Changed Icc2 value from 3 mA to 6 mA in the DC Table Added a footnote on VIH Adde...

Страница 27: ...n Register Map Detail table Added Industrial specs for 25ns and 35ns speed Changed VIH from Vcc 0 3 to Vcc 0 5 Added Data Retention and Endurance table on page 15 Added Thermal resistance values Added...

Страница 28: ...firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement Any reproduction modification translation compilation...

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