CyberResearch UMDAS 0802DA, Руководство пользователя

Страница: 31 / 42

External trigger
Table 4-10. Digital trigger specifications
Parameter Conditions Specification
Trigger source (Note 7) External digital TRIG_IN
Trigger mode Software
selectable Edge sensitive: user configurable for CMOS compatible rising or
falling edge.
Trigger latency 10 µs max
Trigger pulse width 1 µs min
Input high voltage 4.0 V min, 5.5 V absolute max
Input low voltage 1.0 V max, –0.5 V absolute min
Input leakage current ±1.0 µA
Note 7:
TRIG_IN is a Schmitt trigger input protected with a 1.5 kilohm (k Ω ) series resistor.
External clock input/output
Table 4-11. External clock I/O specifications
Parameter Conditions Specification
Pin name SYNC
Pin type Bidirectional
Output (default) Outputs internal A/D pacer clock. Software selectable direction
Input Receives A/D pacer clock from external source.
Input clock rate 48 KHz, maximum
Input mode 1 µs min Clock pulse width
Output mode 5 µs min
Input leakage current Input mode ±1.0 µA
Input high voltage 4.0 V min, 5.5 V absolute max
Input low voltage 1.0 V max, –0.5 V absolute min
IOH = –2.5 mA 3.3 V min Output high voltage (Note 8)
No load 3.8 V min
IOL = 2.5 mA 1.1 V max Output low voltage (Note 8)
No load 0.6 V max
Note 8:
SYNC is a Schmitt trigger input and is over-current protected with a 200 Ω series resistor.
Counter section
Table 4-12. Counter specifications
Pin name (Note 9) CTR
Counter type Event
counter
Number of channels 1
Input type TTL, rising edge triggered
Input source CTR screw terminal
Resolution 32 bits
Schmidt trigger hysteresis 20 mV to 100 mV
Input leakage current ±1 µA
Maximum input frequency 1 MHz
High pulse width 500 ns min
Low pulse width 500 ns min
Input high voltage 4.0 V min, 5.5 V absolute max
Input low voltage 1.0 V max, –0.5 V absolute min
Note 9:
CTR is a Schmitt trigger input protected with a 1.5K Ω series resistor.
4-4
U
MDAS 0802DA
User's Guide
S
pecifications