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16
•
JP9
:
Dual/Single Voltage Select
JP19
DESCRIPTION
ON
Dual Voltage
OFF
Single Voltage
2.10 Watch
d
og Timer
There are three access cycles of Watch
d
og Timer
:
Enable, Refresh
and Disable. The Enable cycle should proceed by READ PORT 443H. The
Disable cycle should proceed by READ PORT 045H. A continue Enable
cycle after a first Enable cycle means Refresh.
I
f the Enable cycle is active, a Refresh cycle is requested before the
time-out period for restarting counts the WDT Timer's period. Otherwise, it
will assume that the program operation is abnormal when the time
counting over the period preset of WDT Timer. A System Reset signal to
start again or a NMI cycle to the CPU comes if over.
The JP14 is using to select the active function of watchdog timer in
disable the watchdog timer, or presetting the watchdog timer activity at
the reset trigger, or presetting the watchdog timer activity at the NMI
trigger.
•
JP14: Watch
d
og Active Type Setting
JP14
DESCRIPTION
*2-3
System Reset
1-2
Active NMI
OFF disable Watchdog timer
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