Curtiss-Wright FibreXtreme SL240, Справочник по аппаратуре

Страница: 27 / 76

OPERATION
All FPDP signals, with the exclusion of /SYNC, are passed around the transmit FIFO,
and are not synchronized with the data stream. For PCI variations of this card, the FPDP
signals can be written to a register and then transmitted across the link.
4.2.3 Loop Operation
In the Loop Operation discussion below, SL240 is used generically to refer to any
Curtiss-Wright Controls, Inc. SL240 card (PCI, PMC, CPCI, or CMC). Anything that
applies to only a specific SL240 product will be noted as such.
Loop operation with the SL240 acts like a virtual FPDP bus where one source (the loop
master) can transmit to any number of receive nodes. The link protocol is the same for
this operation, except any node in the loop may assert a suspend request embedded in this
data stream. This implies if one node on the loop is not ready to receive data, the source
is backed off for all nodes. This is the same way that multi-drop FPDP busses function.
The fundamental difference between a loop master and a receiving node is the loop
master does not have its loop retransmission enabled. So, to the loop master, it appears as
if it is still in a point-to-point connection with a single node. Receiving nodes, on the
other hand, have knowledge that they are in a loop configuration and must be configured
as such. Note that the loop master receives all the data it transmits, so data can either be
checked for errors or ignored when it is received. This checking (beyond verification of
CRC and 8B/10B decoding validity) is not done in the SL240 and must be implemented
by the system designer.
The receivers on the loop can choose to collect the data or ignore it off the loop. If the
Receive FIFO is enabled (the node is collecting data), a suspend request may be asserted
by this node as the data passes through. If it is not configured to receive the data, it
simply passes the data through the Retransmit FIFO without modifying the suspend
request.
Serial FPDP supports the DIR, NRDY, PIO1, and PIO2 FPDP signals. These signals do
not propagate through the Transmit FIFO or the Receive FIFO and thus cannot be directly
associated with the corresponding data. To guarantee a pulse on these signals is
propagated to the remote Serial FPDP receiver, the pulse width from the host-bus
interface must be equal to or greater than the maximum Serial FPDP frame length (512
words of data with an overhead of nine ordered sets). The use of these signals is host-
specific and is explained below for each SL240 product.
For SL240 PMC-based cards (PCI, PMC, and CPCI), the values of PIO1 and PIO2 are
retransmitted according to their received link values and the values of DIR and NRDY
are used as follows: if the receive interface is enabled, the values transmitted are the
received link values logically ORed with the PMC host-interface values; otherwise, the
values are retransmitted according to their received link values. The values of these four
signals sent to and received from the link are placed in the register set and then can be
accessed by software. These signals are typically used for application-dependent
signaling between nodes. The use of DIR and NRDY is consistent with the use of flow
control (retransmission of a STOP request) for loop operation. See the VITA 17.1 Serial
FPDP specification for additional details.
Note that NRDY as a Serial FPDP signal has no direct impact on the operation of the link
logic. Rather, NRDY is passed through the link logic and its function is dependent on the
respective host interface. The Serial FPDP flow control (implemented via suspend
requests which are also known as STOP ordered sets) is used by the link logic and does
not directly affect the interface between the link logic and host interface.
Copyright 2006 4-3 FibreXtreme Hardware Reference Manual