Mini PCIe ADC
Users Guide
Document: CTIM-00149
Revision: 0.02
Page 14 of 22
Connect Tech Inc. 800-426-8979 | 519-836-1291
Date: 2018-10-25
MEM_WRITE_CONTROL (
ADC# Offset
0x0024)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reserved / Future Use
Current FIFO Write Count
Trigger IRQ at FIFO Count
This register contains the current FIFO capacity, and the interrupt trigger.
Current FIFO Write Count
Shows the current position in the FIFO memory (Read Only)
Trigger IRQ at FIFO Count
Sets the position in the FIFO memory at which the almost full IRQ is
triggered (value must be greater than zero to fire)
Application Examples
These application examples leverage the Connect Tech’s Universal FPGA Driver (UFD) and API
Example A – ADC Operation with same input range
In this example we will set the 2 ADC IC’s to enable sampling, and set the input range for each of the ADCs to
be +/-10.24V. Then we will read back all the channels.
printf(
"ADC0&1: enabling chan0-7 and setting input range\n"
);
control_config = 0xFF;
CTIFPGAWrWord(pbrd, BarIndex, ADC0+CONTROL_CONFIG, control_config);
CTIFPGAWrWord(pbrd, BarIndex, ADC1+CONTROL_CONFIG, control_config);
input_range = 0x0;
CTIFPGAWrDword(pbrd, BarIndex, ADC0+INPUT_RANGE_SELECT, input_range);
CTIFPGAWrDword(pbrd, BarIndex, ADC1+INPUT_RANGE_SELECT, input_range);
printf(
"\nReading ADC Voltages...\n"
);
for
(i=0; i < 8; i++)
{
CTIFPGARdWord(pbrd, BarIndex, ADC0+CH0_LAST(i*2), &testreg);
ADC0votlage = testreg * (20.48/0x10000) - 0x8000 * (20.48/0x10000);
printf(
"ADC0 Ch%d, Address %x, CODE=%04x Voltage=%08f\n"
, i, ADC0+CH0_LAST(i*2),testreg,
ADC0votlage);
}
for
(i=0; i < 8; i++)
{
CTIFPGARdWord(pbrd, BarIndex, ADC1+CH0_LAST(i*2), &testreg);
ADC1votlage = testreg * (20.48/0x10000) - 0x8000 * (20.48/0x10000);
printf(
"ADC1 Ch%d, Address %x, CODE=%04x Voltage=%08f\n"
, i, ADC1+CH0_LAST(i*2),testreg,
ADC1votlage);
}
