Mini PCIe ADC
Users Guide
Document: CTIM-00149
Revision: 0.02
Page 11 of 22
Connect Tech Inc. 800-426-8979 | 519-836-1291
Date: 2018-10-25
Continuous Sampling Mode
Each ADC channel’s code is captured and stored into their CHx-LAST_SAMPLE register. This CHx-
LAST_SAMPLE register is then constantly updated/overwritten with a latest/newest code received.
Waveform Capture Mode (FIFO Mode)
This mode is supplementary to the Continuous Sampling Mode in that the ADC blocks will continue to update
their CHX-LAST_SAMPLE registers while also storing data in their associated sample FIFOs.
An ADC block operating in this mode will signal that its FIFO memory is almost full via a PCIe interrupt; the
sample count at which this notification is made can be adjusted to any value within the sample depth range
supported by the sample FIFOs (2047). Each sample is stored in the FIFOs is saved along with two additional
bookkeeping data fields: the channel number and the sample number.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
11-bit "Timestamp"/Sample Num
R
Channel ID
16-bit CODE from ADC
For example to set up an ADC block to capture data in its sample FIFO and provide a notification once it has
stored 1023 of these values, one would write 0x3FF to the first ten bits of its MEM_WRITE_CONTROL
register and then set the MEM Store flag in its CONTROL_CONFIG register.
Variable Sampling Rate
As already touched upon the default sampling rate of the ADC blocks is 500ksps or the maximum rate
supported by the ADC peripherals. If slower sampling rates are required, then each block can be individually
set to subdivide this maximum rate by way of a counter roll over value stored in the CLK_DIV_CNTR
register.
Essentially, if sample rate division is enabled with bit number nine in the control register of an ADC block then
an internal counter is incremented to the value stored in CLK_DIV_CNTR and then reset, continuously, at the
maximum sampling rate. The actual subdividing of the sample rate then is, in this sense, achieved by storing
new values only when the counter is equal to zero.