Crystal LAN CS8920, Техническое справочное руководство, Страница: 10 / 67

AN84REV1 10
CS8920 Technical Reference Manual
bytes of address space) or in extended
memory address space. Address decoders
for I/O as well as memory mode are on chip
for the CS8920.
2.1.2.4 EEPROM
A 128 word (128 X16 bit) EEPROM
(location U3) is used in the reference
design to interface with the CS8920. This
EEPROM holds the IEEE assigned
Ethernet MAC (physical) address for the
board (see Section 3.3.1). The EEPROM
also holds other configuration information
for the CS8920. The EEPROM also holds
the Plug & Play resource information. The
last few bytes of the EEPROM are used to
store information about the hardware
configuration and software requirements.
Since the CS8920 has full Plug & Play
support, it requires an EEPROM to
configure itself after a reset.
Please refer to the CS8920 data sheet for
information about programming the
EEPROM. Please refer to the Section 3.0
of this document for information about
EEPROM internal word assignments.
2.1.2.5 LEDs
Many embedded systems do not require
LEDs for Ethernet traffic. Therefore this
reference design does not implement any
LEDs. However, the CS8920 has direct
drives for the four LEDs. Please refer to
the data sheet for the CS8920 for a
description of the LED functions available.
2.1.2.6 10BASE-T Interface
The 10BASE-T interface for the CS8920 is
straight forward. Please refer to Figure
2.1.4 for connections and components of
this circuit. Transmit and receive signal
lines from the CS8920 are connected to an
isolation transformer at location T1. This
isolation transformer has a 1:1 ratio
between the primary and the secondary
windings on the receive side, and a 1:
√
2
(1:1.41) ratio between the primary and the
secondary windings for the transmit lines.
Resistor R1 provides termination for the
receive lines. Resistors R2 and R3 are in
series with the differential pair of transmit
lines for impedance matching.
2.1.2.7 10BASE-2 and AUI Interfaces
As many embedded systems require only a
10BASE-T interface, this reference design
implements only the 10BASE-T interface.
However, should a user require a 10BASE-
2 or AUI interface, the CS8920 provides a
direct interface to the AUI. Please refer to
the CS8900 Technical Reference Manual
or the CS8920 datasheet for details about
the AUI interface.
2.1.3 Logic Schematics
Figures 2.1.2 and 2.1.4 detail the logic
schematics for the various circuits used in
the reference design.
2.1.4 Component Placement and Signal
Routing
Please refer to the Section 2.2 of this
document for more details on the placement
of components on the board. It is important
to provide very clean and ad5 V
and ground connections to the CS8920.