3 Jumper Setting
26
SIS-8601-LVA
3.3.2 RS-485
Setting
RTS#
JP9: 7-8
TXD
JP10: 7-8
JP10: 5-6
D
R
RXD
COM2
1
2
3
4
5
6
7
8
9
JP9: 5-6
JP9: 4-6
120
Ω
120
Ω
DATA-
DATA+
I/O addresses and instructions
The table below lists I/O addresses for use as COM2.
I/O address
DLAB
Read/Write
Register
W
Transmitter holding Register
THR
0
R
Receiver buffer Register
RBR
02F8H
1
W
Divisor latch Register (LSB)
DLL
1
W
Divisor latch Register (MSB)
DLM
02F9H
0
W
Interrupt enable Register
IER
02FAH
X
R
Interrupt ID Register
IIR
02FBH
X
W
Line control Register
LCR
02FCH
X
W
Modem Control Register
MCR
02FDH
X
R
Line status Register
LSR
02FEH
X
R
Modem Status Register
MSR
02FFH
X
R/W
Scratch Register
SCR
Содержание SIS-8601-LVA
Страница 15: ...1 Introduction 8 SIS 8601 LVA...
Страница 37: ...3 Jumper Setting 30 SIS 8601 LVA...
Страница 41: ...4 CPU card Resources 34 SIS 8601 LVA...
Страница 89: ...6 BIOS Setup 82 SIS 8601 LVA...