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Product Nomenclature and Function
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CPS-CNT-3202I Reference Manual (Hardware)
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27
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4.
Count Clear
Example counting during synchronous clear
If a counter is set for CW (clockwise) direction Up-count and phase-Z positive logic, within a low level
input of phase-B, a high level signal of phase-Z input will reset the count value of this counter; after
this phase-Z input signal goes to low level, the following rising edge of the phase-A signal will start
the counting operation.
* When decremental counting in the CW direction is set, the board performs decremental counting
at the rising edge of the phase-A signal while the phase-B input remains low.
* When phase-Z negative logic is used, the signal is enabled while the phase-Z input remains low.
Asynchronous Clear
If a counter is set for CW (clockwise) direction Up-count and phase-Z positive logic, whenever the
phase-Z input goes high will reset the count value no matter which signal level the phase-A and
phase-B is. The counter will start counting from next rising edge of the phase-A no matter what
signal level the phase-Z is.
* When incremental counting in the CW direction is set with phase-Z positive logic, the board
performs decremental counting at the rising edge of the phase-A signal while the phase-B input
remains low.
* When phase-Z negative logic is used, the signal is enabled while the phase-Z input remains low.
Phase-A
(Phase-A/UP)
Phase-B
(Phase-B/DOWN)
Phase-Z
(Phase-Z/CLR)
Count value
Phase-A
(Phase-A/UP)
Phase-B
(Phase-B/DOWN)
Phase-Z
(Phase-Z/CLR)
Count value
