5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
27M_SEL
CLK_XTAL_IN
CLK_XTAL_OUT
CLK_48M
SRC_SLOW
SRC_SLOW
+3VS_CLKVDDA
SEL_SATA
CLK_14.318M
27M_SEL
SEL_SATA
CLK_XTAL_IN
CLK_XTAL_OUT
CLK_SRC7C
CL
K_
SB#
CL
K_
SB
CLK_SBLINK_BCLK#
CLK_SBLINK_BCLK
CLK_SBSRC_BCLK#
CLK_SBSRC_BCLK
ATIG1
ATIG1#
CPUCK
CPUCK#
CLK_PCIE_LAN <32>
CLK_PCIE_LAN# <32>
CLK_CPU_BCLK# <8>
CLK_CPU_BCLK <8>
CLK_48M_USB
<27>
CLK_NBHT# <13>
CLK_NBHT <13>
CLK_NBGFX <13>
CLK_NBGFX# <13>
CLK_SBLINK_BCLK# <13>
CLK_SBLINK_BCLK <13>
CLK_SBSRC_BCLK# <26>
CLK_SBSRC_BCLK <26>
CLK_PEG_VGA# <15>
CLK_PEG_VGA <15>
27M_NSSC <16>
CLK_NB_14.318M
<13>
LAN_CLKREQ#
<27,32>
CLK_PCIE_MINI1#
<34>
CLK_PCIE_MINI1
<34>
MINI1_CLKREQ#
<27,34>
SB_SMDAT0 <10,11,27,34>
SB_SMCLK0 <10,11,27,34>
SUSP#
<36,42,46>
SUSP
<42,49>
VGA_ON
<36,38,42,50>
VGA_ON# <42>
CPU_HT_CLKP <26>
CPU_HT_CLKN <26>
NB_HT_CLKP <26>
NB_HT_CLKN <26>
GPP_CLK3P <26>
GPP_CLK3N <26>
GPP_CLK1P <26>
GPP_CLK1N <26>
VGA_DBCLK <36>
VGA_CLKP <26>
VGA_CLKN <26>
+3VS_CLK
+VDDCLK_IO
+3VS_CLK
+3VS_CLK
+VDDCLK_IO
+3VS_CLK
+3VS
+3VS_CLK
+3VS_CLK
+3VS
+3VS_CLK
+VDDCLK_IO
+1.1VALW
+1.1VS
Title
Size
Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
22
55
Tuesday, September 14, 2010
2008/10/06
2010/03/12
Compal Electronics, Inc.
Title
Size
Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
22
55
Tuesday, September 14, 2010
2008/10/06
2010/03/12
Compal Electronics, Inc.
Title
Size
Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
22
55
Tuesday, September 14, 2010
2008/10/06
2010/03/12
Compal Electronics, Inc.
GLAN
NB GFX
CPU
1U CLOSE PIN 69
MiniCard_1
SB RCLK
Mini Card1
NB A LINK
VGA
VGA option solution
1st (SILEGO) : SA00001Z310 S IC SLG8SP626VTR QFN 72P CLK GEN
2nd (ICS) : SA000023H10 S IC ICS9LPRS488CKLFT MLF 72P CLK GEN
1.1V 158R/90.0R
RS780
CLK_NB_14.318M
LAN
single-ended 66MHz HTT output
SEL_SATA
SEL_HTT66
* default
SPREAD 100M SATA SRC6 output
1
*
0
1 *
0
differential 100MHz HTT output
NON SPREAD 100M SATA SRC6 output
NON SPREAD 27M and SPREAD 27M output
1 *
0
differential spread SRC_7 output
27M_SEL
NB HT
Routing the trace at least 10mil
+1.1VS_CLK
Close to CLK_GEN
Change Y2 to
TXC-SJ100009R00
<20ppm / 20pF>
R518
0_0402_5%
INT@
R518
0_0402_5%
INT@
1
2
L98
FBMA-L11-201209-221LMA30T_0805
EXTPW@
L98
FBMA-L11-201209-221LMA30T_0805
EXTPW@
1
2
R432
0_0402_5%
INT@
R432
0_0402_5%
INT@
1
2
R246
33_0402_5%
EXT@
R246
33_0402_5%
EXT@
1
2
C527
0.1U_0402_16V4Z
EXT@
C527
0.1U_0402_16V4Z
EXT@
1
2
R435
0_0402_5%
INT@
R435
0_0402_5%
INT@
1
2
R429
0_0402_5%
INT@
R429
0_0402_5%
INT@
1
2
C847
0.1U_0402_16V4Z
EXTPW@
C847
0.1U_0402_16V4Z
EXTPW@
1
2
C517
0.1U_0402_16V4Z
EXT@
C517
0.1U_0402_16V4Z
EXT@
1
2
R600
100K_0402_5%
EXTPW@
R600
100K_0402_5%
EXTPW@
1
2
C515
22U_0805_6.3V6M
EXT@
C515
22U_0805_6.3V6M
EXT@
1
2
R535
0_0402_5%
EXT@
R535
0_0402_5%
EXT@
1
2
C533
22U_0805_6.3V6M
EXT@
C533
22U_0805_6.3V6M
EXT@
1
2
Y2
14.318MHZ_16PF_7A14300083
EXT@
Y2
14.318MHZ_16PF_7A14300083
EXT@
1
2
R534
0_0402_5%
EXT@
R534
0_0402_5%
EXT@
1
2
R538
0_0402_5%
EXT@
R538
0_0402_5%
EXT@
1
2
R240
8.2K_0402_5%
@
R240
8.2K_0402_5%
@
1
2
C528
0.1U_0402_16V4Z
EXT@
C528
0.1U_0402_16V4Z
EXT@
1
2
C530
0.1U_0402_16V4Z
EXT@
C530
0.1U_0402_16V4Z
EXT@
1
2
R237
8.2K_0402_5%
@
R237
8.2K_0402_5%
@
1
2
R245
0_0402_5%
INT@
R245
0_0402_5%
INT@
1
2
C524
0.1U_0402_16V4Z
EXT@
C524
0.1U_0402_16V4Z
EXT@
1
2
L56
FBMA-L11-201209-221LMA30T_0805
EXT@ L56
FBMA-L11-201209-221LMA30T_0805
EXT@
1
2
C516
0.1U_0402_16V4Z
EXT@
C516
0.1U_0402_16V4Z
EXT@
1
2
R238
8.2K
_0402_5%
R238
8.2K
_0402_5%
1
2
R436
0_0402_5%
INT@
R436
0_0402_5%
INT@
1
2
C529
0.1U_0402_16V4Z
EXT@
C529
0.1U_0402_16V4Z
EXT@
1
2
G
D
S
Q50
SI2301CDS-T1-GE3_SOT23-3
EXTPW@
G
D
S
Q50
SI2301CDS-T1-GE3_SOT23-3
EXTPW@
2
1
3
C535
0.1U_0402_16V4Z
EXT@
C535
0.1U_0402_16V4Z
EXT@
1
2
R519
0_0402_5%
INT@
R519
0_0402_5%
INT@
1
2
R249
8.2K_0402_5%
EXT@
R249
8.2K_0402_5%
EXT@
1
2
G
D
S
Q54
2N7002_SOT23
EXTPW@
G
D
S
Q54
2N7002_SOT23
EXTPW@
2
1
3
R243
90.9_0402_1%
R243
90.9_0402_1%
1
2
R433
0_0402_5%
INT@
R433
0_0402_5%
INT@
1
2
R255
0_0402_5%
@
R255
0_0402_5%
@
1
2
R438
0_0402_5%
INT@
R438
0_0402_5%
INT@
1
2
R599
470_0603_5%
EXTPW@
R599
470_0603_5%
EXTPW@
1
2
C537
27P_0402_50V8J
EXT@
C537
27P_0402_50V8J
EXT@
1
2
C526
0.1U_0402_16V4Z
EXT@
C526
0.1U_0402_16V4Z
EXT@
1
2
R263
0_0402_5%
R263
0_0402_5%
1
2
G
D
S
Q52
2N7002_SOT23
EXTPW@
G
D
S
Q52
2N7002_SOT23
EXTPW@
2
1
3
R520
0_0402_5%
INT@
R520
0_0402_5%
INT@
1
2
R236
8.2K_0402_5%
EXT@
R236
8.2K_0402_5%
EXT@
1
2
C521
0.1U_0402_16V4Z
EXT@
C521
0.1U_0402_16V4Z
EXT@
1
2
C531
0.1U_0402_16V4Z
EXT@
C531
0.1U_0402_16V4Z
EXT@
1
2
R431
0_0402_5%
INT@
R431
0_0402_5%
INT@
1
2
R244
158_0402_1%
EXT@
R244
158_0402_1%
EXT@
1
2
C520
0.1U_0402_16V4Z
EXT@
C520
0.1U_0402_16V4Z
EXT@
1
2
C536
27P_0402_50V8J
EXT@
C536
27P_0402_50V8J
EXT@
1
2
R497
0_0402_5%
INT@
R497
0_0402_5%
INT@
1
2
R242
8.2K_0402_5%
EXT@
R242
8.2K_0402_5%
EXT@
1
2
R601
100K_0402_5%
EXTPW@
R601
100K_0402_5%
EXTPW@1
2
R241
8.2K_0402_5%
EXT@
R241
8.2K_0402_5%
EXT@
1
2
R539
0_0402_5%
EXT@
R539
0_0402_5%
EXT@
1
2
R239
8.2K
_0402_5%
R239
8.2K
_0402_5%
1
2
R434
0_0402_5%
INT@
R434
0_0402_5%
INT@
1
2
C518
0.1U_0402_16V4Z
EXT@
C518
0.1U_0402_16V4Z
EXT@
1
2
C522
22U_0805_6.3V6M
EXT@
C522
22U_0805_6.3V6M
EXT@
1
2
C525
0.1U_0402_16V4Z
EXT@
C525
0.1U_0402_16V4Z
EXT@
1
2
C532
1U_0402_6.3V4Z
EXT@
C532
1U_0402_6.3V4Z
EXT@
1
2
ICS 9LPRS488
U17
SLG8SP626VTR_QFN72_10x10
EXT@
ICS 9LPRS488
U17
SLG8SP626VTR_QFN72_10x10
EXT@
SMBCLK
1
SMBDAT
2
VDDDOT
3
SRC7C_LPRS/27MHz_NS
4
SRC7T_LPRS/27MHz_SS
5
GNDDOT
6
SRC5C_LPRS
7
SRC5T_LPRS
8
SRC4C_LPRS
9
SRC4T_LPRS
10
GNDSRC
11
VDDSRC_IO
12
SRC3C_LPRS
13
SRC3T_LPRS
14
SRC2C_LPRS
15
SRC2T_LPRS
16
VDDSRC
17
VDDSRC_IO
18
GNDSRC
19
SRC1C_LPRS
20
SRC1T_LPRS
21
SRC0C_LPRS
22
SRC0T_LPRS
23
CLKREQ0 #
24
ATIG2C_LPRS
25
ATIG2T_LPRS
26
GNDATIG
27
VDDATIG_IO
28
VDDATIG
29
ATIG1C_LPRS
30
ATIG1T_LPRS
31
ATIG0C_LPRS
32
ATIG0T_LPRS
33
SB_SRC1C_LPRS
34
SB_SRC1T_LPRS
35
GNDSB_SRC
36
GND48
72
48MHz_0
71
48MHz_1
70
VDD48
69
X2
68
X1
67
GNDREF
66
REF0/SEL_HTT66
65
REF1/SEL_SATA
64
REF2/SEL_27
63
VDDREF
62
VDDHTT
61
HTT0T_LPRS / 66 M
60
HTT0C_LPRS / 66 M
59
GNDHTT
58
PD#
57
CPUKG0T_LPRS
56
CPUKG0C_LPRS
55
VDDCPU
54
VDDCPU_IO
53
GNDCPU
52
CLKREQ1#
51
CLKREQ2#
50
VDDA
49
GNDA
48
GNDSATA
47
SRC6T/SATAT_LPRS
46
SRC6C/SATAC_LPRS
45
VDDSATA
44
CLKREQ3#
43
CLKREQ4#
42
SB_SRC_SLOW#
41
SB_SRC0T_LPRS
40
SB_SRC0C_LPRS
39
VDDSB_SRC
38
VDDSB_SRC_IO
37
GNDPAD
73
R437
0_0402_5%
INT@
R437
0_0402_5%
INT@
1
2
C519
0.1U_0402_16V4Z
EXT@
C519
0.1U_0402_16V4Z
EXT@
1
2
R150
10K_0402_5%
@ R150
10K_0402_5%
@
1
2
L57
BLM18AG601SN1D_2P
EXT@
L57
BLM18AG601SN1D_2P
EXT@
1
2
R248
0_0402_5%
VGAOPT@
R248
0_0402_5%
VGAOPT@
1
2
C534
0.1U_0402_16V4Z
EXT@
C534
0.1U_0402_16V4Z
EXT@
1
2
L54
FBMA-L11-201209-221LMA30T_0805
UMAO@ L54
FBMA-L11-201209-221LMA30T_0805
UMAO@
1
2
R430
0_0402_5%
INT@
R430
0_0402_5%
INT@
1
2
L55
FBMA-L11-201209-221LMA30T_0805
L55
FBMA-L11-201209-221LMA30T_0805
1
2
C523
0.1U_0402_16V4Z
EXT@
C523
0.1U_0402_16V4Z
EXT@
1
2
R540
0_0402_5%
EXT@
R540
0_0402_5%
EXT@
1
2
