Line Monitoring Relay CDMR-61 / User Manual
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Attention: Operating in parallel with system requires undervoltage limits >= 70% Un (rated voltage) of at least
one undervoltage function, because frequency and vector surge functions are inhibited,
if all 3 voltages drop below 70% of Un.
Trip logic selection for U< function:
Selected by the Parameter "U< Trip Logik" in the menue chain "General Settings".
"U< Trip Logic" = OFF: standard single phase sensitivity, function is already energized, if the voltage of one line
drops below the low-limit value.
"U< Trip Logic = ON: 2-phase sensitiviy, function is only energized, if the voltage of at least 2 lines drop below the
low-limit value.
Voltage Asymmetry Asy
The voltage asymmetry function is energized, if any difference between the 3 line voltages exceed the limit value. De-
pendent on star-type or delta connection selected, the corresponding voltages are monitored. Energizing is independent
of absolut voltage values and also active in the case of single or double total voltage failure. Blocking by the external
input B is possible (see chapter on page 7)
Phase Angle Asymmetrie Psy
This function monitores the deviation of the 3 phase angles from 120° . It is energized, if at least one phase angle dif-
fers more that the setting value from 120°, e.g.
Setting value = 4°, Tripping at phase angles <= 116° or >= 124°.
This function requires "4-wire mains" configuration and correct phase sequence. The measured phase angle values are
displayed in the "Line: Lxy-Angle " menue (see fig.3). This function may be inhibited by the external blocking input (see
page 7).
Frequency monitoring f<<, f<, f>, f>>
Frequency monitoring comprises all 3 lines but requires at least one line voltage >= 70% Un to be enabled.
Energizing
is inhibited, if all line voltages drop below 70% Un.
These functions may also be inhibited by the external blocking
input (see page 7).
Vector surge Vs>
Vector surge monitoring is carried out independently in each line. Tripping execution depends on the logic combination
selected in the menue "Vector Surge Vs> \ Trip Logic Vs>":
Value Logic
Comment .
1
"L1 "
tripping on Vs> in line L1 (independent of L2 and L3)
2
"L2 "
tripping on Vs> in line L2 (independent of L1 and L3)
3
"L3 "
tripping on Vs> in line L3 (independent of L2 and L3)
4
"L1,L2,L3"
tripping on Vs> in line L1 or L2 or L3 (inclusive "or")
5
"L1+L2 "
tripping on Vs> in line L1 and L2 (independent of L3)
6
"L1+L3 "
tripping on Vs> in line L1 and L3 (independent of L2)
7
"L2+L3 "
tripping on Vs> in line L2 and L3 (independent of L1)
8
"L1+L2+L3"
Tripping on Vs> in line L1 and L2 and L3 (within two periods)
9
"OFF "
Vs> tripping disabled
Vector surge energizing of a single line is inhibited, if the voltage of this line drops below 70% Un.
Energizing is
further inhibited:
- for the selected "BlockingTime" after power-on (supply voltage)
- for the selected "BlockingTime" after rising of a line voltage (from failure) above 70% Un.
- by the external blocking input (After release of the blocking input, the "BlockingTime" is started and the function is still
inhibited until this time interval has passed).
The length of the Vs> tripping signal is selectable in the menue "Vector Surge Vs> \ Pulsewidth... Vs>"
Phase sequence SEQ
The phase sequence (L1-L2-L3) is checked once on the rising of all 3 line voltages above 60%Un or in the case of
power-on of the supply voltage. A wrong phase sequence forces the assigned relay(s) to be permanently in the alert
state. The display shows the message: "PHASE SEQUENCE L1-L2-L3 fault!"
Change of setting values
CDMR61e_man_A1.doc
