Clevo W760TH, Руководство по обслуживанию

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Schematic Diagrams
CANTIGA 2/7, Graphics B - 7
B.Sch
e
m
a
tic D
iag
rams
CANTIGA 2/7, Graphics
1. 05VM_PEG
3.3 VS
3.3VS 2, 3,7, 10,12, 13,1 4,15, 16,17 ,18,1 9,21, 22,23 ,25,2 6,27, 33
DAC_RED 1 4
DAC_GREEN 1 4
DAC_BLUE 1 4
DAC_DDCACLK 1 4
DAC_ DDCADATA 14
DAC_VSYNC 14
DAC_HSYNC 14
LVDS-L2 P 14
LVDS-U2P 14
LVDS-L0 N 14
LVDS-U2N 14
LVDS-LCL KN 14
P_DDC_CLK 14
LVDS-U0P 14
P_DDC_DATA 14
L VDS-UCLKP 14
LVDS-L1 N 14
LVDS-U1N 14
LVDS-L0 P 14
LVDS-U0N 14
L VDS-LCLKP 14
LVDS-U1P 14
BLON 14
NB_ENAVDD 14
LVDS-UCLKN 14
LVDS-L1 P 14
LVDS-L2 N 14
1.05VM_PEG 10
Z0601
LVDS_IBG
LVDS_VBG
DAC_RED
DAC_BLU E
TVC_ DAC
TVA_DAC
LVDSA_DATA3
Z06 05
CRT_VS
Z06 04
Z06 02
LVDSB_DATA3
CRT_HS
TVB_DAC
CRT_TVO
Z06 03
LVDSB_DATA#3
L_BKLT_ CTRL
LVDSA_DATA#3
PEG_COMP
DAC_GREEN
R122
10K_04
R48 0 2. 37K_1%_0 4
C664
22P
_50
V
_04
R94 3 0.1_1 %_04
R95 75_1%_04
R86 75_1%_04
C6 73
22P
_50
V
_04
C226
30P_50V_04
R91
150_
1%
_04
R82 75_1%_04
LV
DS
PC
I-
EX
PR
ES
S GR
AP
HI
CS
TV
VG
A
U23C
CANTIGA
T37
T36
H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39
H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40
J41
Y40
M40
M42
R48
N38
T40
U37
U40
M46
AA46
AA37
AA40
AD43
AC46
M47
J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46
M3 2
M3 3
K3 3
J3 3
M2 9
C4 4
B4 3
E3 7
E3 8
C4 1
C4 0
H4 7
E4 6
G4 0
D4 5
F4 0
B3 7
A3 7
A4 1
H3 8
G3 7
G3 8
F3 7
G3 2
F2 5
H2 5
K2 5
H2 4
E2 8
H3 2
J3 2
G2 8
J2 9
E2 9
J2 8
G2 9
L2 9
H4 8
B4 2
L3 2
C3 1
E3 2
A4 0
B4 0
J3 7
K3 7
PEG_COMPI
PEG_COMPO
PEG_RX#_ 0
PEG_RX#_ 1
PEG_RX#_ 2
PEG_RX#_ 3
PEG_RX#_ 4
PEG_RX#_ 5
PEG_RX#_ 6
PEG_RX#_ 7
PEG_RX#_ 8
PEG_RX#_ 9
PEG_RX#_1 0
PEG_RX#_1 1
PEG_RX#_1 2
PEG_RX#_1 3
PEG_RX#_1 4
PEG_RX#_1 5
PEG_RX_ 0
PEG_RX_ 1
PEG_RX_ 2
PEG_RX_ 3
PEG_RX_ 4
PEG_RX_ 5
PEG_RX_ 6
PEG_RX_ 7
PEG_RX_ 8
PEG_RX_ 9
PEG_RX_1 0
PEG_RX_1 1
PEG_RX_1 2
PEG_RX_1 3
PEG_RX_1 4
PEG_RX_1 5
PEG_TX#_ 0
PEG_TX#_1 0
PEG_TX#_ 3
PEG_TX#_ 4
PEG_TX#_ 5
PEG_TX#_ 6
PEG_TX#_ 7
PEG_TX#_ 8
PEG_TX#_ 9
PEG_TX#_ 1
PEG_TX#_1 1
PEG_TX#_1 2
PEG_TX#_1 3
PEG_TX#_1 4
PEG_TX#_1 5
PEG_TX#_ 2
PEG_TX_ 0
PEG_TX_ 1
PEG_TX_ 2
PEG_TX_ 3
PEG_TX_ 4
PEG_TX_ 5
PEG_TX_ 6
PEG_TX_ 7
PEG_TX_ 8
PEG_TX_ 9
PEG_TX_1 0
PEG_TX_1 1
PEG_TX_1 2
PEG_TX_1 3
PEG_TX_1 4
PEG_TX_1 5
L_CTRL _CLK
L_CTRL _DATA
L_DDC_CL K
L_DDC_DATA
L_VDD_EN
LVDS_I BG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA# _0
LVDSA_DATA# _1
LVDSA_DATA# _2
LVDSA_DATA_ 1
LVDSA_DATA_ 2
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA# _0
LVDSB_DATA# _1
LVDSB_DATA# _2
LVDSB_DATA_ 1
LVDSB_DATA_ 2
L_BKL T_EN
TVA_DAC
TVB_DAC
TVC_DAC
TV_RTN
CRT_BLUE
CRT_DDC_C LK
CRT_DDC_D ATA
CRT_GREEN
CRT_HSYNC
CRT_TVO_IR EF
CRT_RED
CRT_I RTN
CRT_VSYNC
LVDSA_DATA_ 0
LVDSB_DATA_ 0
L_BKL T_CTRL
TV_DCONSEL_0
TV_DCONSEL_1
LVDSA_DATA# _3
LVDSA_DATA_ 3
LVDSB_DATA# _3
LVDSB_DATA_ 3
R115
10K_04
R11 4 *20mil_ short
R98
2.2 1K_1 %_04
L11
*20 mil_shor t
R99
1
50_1%
_04
R102
2.21K_1%_04
R88 3 0.1_1 %_04
R78 1 .02K_1%_04
R12 0 *20mil_ short
C2 24
3 0P_ 50V_ 04
C6 68
22P
_50
V
_04
R83
1
50_1%
_04
R141
49. 9_1%_ 04
Zo=
50O? 5%
Minimize REFSET
routing length a nd
shield with VSS
Zo=
55O? 5%
MAX=0.5"
Zdiff=
100O? 0%
PEG _COMPI and th e PEG_ COMPO pins sh ould b e
sho rted a t the p ackage and t hen rou ted to one
end of a 49.9 O ? % pu ll-up resisto r to
VCC _PEG. Place t he res istor within 500 mi ls
(1. 27 cm) of the (G)MC H
Sheet 6 of 38
CANTIGA 2/7,
Graphics