Schematic Diagrams
Processor 3/7 B - 5
B.Schematic Diagrams
Processor 3/7
SB_DIMM_VREFDQ
M_B_B4
M_B_B6
M_B_B5
M_B_B13
M_B_B12
M_B_B0
M_B_B1
M_B_B2
M_B_B3
M_B_B7
M_B_B8
M_B_B9
M_B_B10
M_B_B11
M_B_B14
M_B_B15
SM_VREF_R
SM_VREF
RSVD_AC7
SA_DIMM_VREFDQ
R431
*1K_04
SB_DIMM_VREFDQ
R442
1K_1%_04
R429
1K_1%_04
R416
0_04
R699
1K_1%_04
R446
1K_1%_04
R698
1K_1%_04
Q36
*AO3402L
G
D
S
Q37
*AO3402L
G
D
S
R443
0_04
Q56
*AO3402L
G
D
S
R430
0_04
Haswell rPGA EDS
3 OF 9
U32C
VSS
V10
SA_BS_0
V5
SA_BS_1
U5
SA_DQ_48
B5
SA_CKP1
V3
SA_CS_N_1
L9
SA_CS_N_2
M9
SA_CS_N_3
M10
SA_ODT_0
M8
SA_ODT_1
L7
SA_ODT_2
L8
SA_ODT_3
L10
SA_BS_2
AD1
SA_RAS
U6
SA_WE
U7
SA_CAS
U8
SA_MA_0
V8
SA_MA_1
AC6
SA_MA_10
V6
SA_MA_11
AC1
SA_MA_12
AD4
SA_MA_13
V7
SA_MA_14
AD3
SA_MA_15
AD2
SA_MA_2
V9
SA_MA_3
U9
SA_MA_4
AC5
SA_MA_5
AC4
SA_MA_6
AD6
SA_MA_7
AC3
SA_MA_8
AD5
SA_MA_9
AC2
SA_DQS_N_0
AP15
SA_DQS_N_1
AP8
SA_DQS_N_2
AJ 8
SA_DQS_N_3
AF3
SA_DQS_N_4
J3
SA_DQS_N_5
E2
SA_DQS_N_6
C5
SA_DQS_N_7
C11
SA_DQS_P_0
AP14
SA_DQS_P_1
AP9
SA_DQS_P_2
AK8
SA_DQS_P_3
AG3
SA_DQS_P_4
H3
SA_DQS_P_5
E3
SA_DQS_P_6
C6
SA_DQS_P_7
C12
SA_DQ_0
AR15
SA_DQ_1
AT14
SA_DQ_2
AM14
SA_DQ_3
AN14
SA_DQ_4
AT15
SA_DQ_5
AR14
SA_DQ_6
AN15
SA_DQ_7
AM15
SA_DQ_8
AM9
SA_DQ_9
AN9
SA_DQ_10
AM8
SA_DQ_11
AN8
SA_DQ_12
AR9
SA_DQ_13
AT9
SA_DQ_14
AR8
SA_DQ_15
AT8
SA_DQ_16
AJ9
SA_DQ_17
AK9
SA_DQ_18
AJ6
SA_DQ_19
AK6
SA_DQ_20
AJ10
SA_DQ_21
AK10
SA_DQ_22
AJ7
SA_DQ_23
AK7
SA_DQ_24
AF4
SA_DQ_25
AF5
SA_DQ_26
AF1
SA_DQ_27
AF2
SA_DQ_28
AG4
SA_DQ_29
AG5
SA_DQ_30
AG1
SA_DQ_31
AG2
SA_DQ_32
J1
SA_DQ_33
J2
SA_DQ_34
J5
SA_DQ_35
H5
SA_DQ_36
H2
SA_DQ_37
H1
SA_DQ_38
J4
SA_DQ_39
H4
SA_DQ_43
D3
SA_DQ_60
E11
SA_DQ_61
D11
SA_DQ_62
B12
SA_DQ_63
A12
SM_VREF
AM3
SA_DIMM_VREFDQ
F16
SB_DIMM_VREFDQ
F13
SA_DQ_40
F2
SA_DQ_41
F1
SA_DQ_42
D2
SA_DQ_44
D1
SA_DQ_46
C3
SA_DQ_47
B3
SA_DQ_49
E6
SA_DQ_59
A11
SA_DQ_58
B11
SA_DQ_57
D12
SA_DQ_56
E12
SA_DQ_55
A6
SA_DQ_54
B6
SA_DQ_53
E5
SA_DQ_52
D5
SA_DQ_51
D6
SA_DQ_50
A5
SA_DQ_45
F3
SA_CKE_0
AD9
SA_CKP0
V4
SA_CKN1
U3
SA_CKE_1
AC9
SA_CKN2
U2
SA_CKP2
V2
SA_CKE_2
AD8
SA_CKN3
U1
SA_CKE_3
AC8
SA_CKP3
V1
SA_CS_N_0
M7
SA_CKN0
U4
RSVD
AC7
R482
1K_1%_04
Haswell rPGA EDS
4 OF 9
U32D
VSS
R10
SB_DQ_32
L2
SB_DQ_34
L4
SB_DQ_36
L1
SB_DQ_37
M1
SB_CKE_2
AG9
SB_CKE_3
AF9
SB_CS_N_0
P4
SB_CS_N_1
R2
SB_CS_N_2
P3
SB_CS_N_3
P1
SB_ODT_0
R4
SB_ODT_1
R3
SB_ODT_2
R1
SB_ODT_3
P2
SB_BS_0
R7
SB_BS_1
P8
SB_BS_2
AA9
SB_RAS
R6
SB_WE
P6
SB_CAS
P7
SB_MA_0
R8
SB_MA_1
Y 5
SB_MA_2
Y 10
SB_MA_3
AA5
SB_MA_4
Y 7
SB_MA_5
AA6
SB_MA_6
Y 6
SB_MA_7
AA7
SB_MA_8
Y 8
SB_MA_9
AA10
SB_MA_10
R9
SB_MA_11
Y 9
SB_MA_12
AF7
SB_MA_13
P9
SB_MA_14
AA8
SB_MA_15
AG7
SB_DQS_N_0
AP18
SB_DQS_N_1
AP11
SB_DQS_N_2
AP5
SB_DQS_N_3
AJ3
SB_DQS_N_4
L3
SB_DQS_N_5
H9
SB_DQS_N_6
C8
SB_DQS_N_7
C14
SB_DQS_P_0
AP17
SB_DQS_P_1
AP12
SB_DQS_P_2
AP6
SB_DQS_P_3
AK3
SB_DQS_P_4
M3
SB_DQS_P_5
H8
SB_DQS_P_6
C9
SB_DQS_P_7
C15
SB_DQ_0
AR18
SB_DQ_1
AT18
SB_DQ_2
AM17
SB_DQ_3
AM18
SB_DQ_4
AR17
SB_DQ_5
AT17
SB_DQ_6
AN17
SB_DQ_7
AN18
SB_DQ_8
AT12
SB_DQ_9
AR12
SB_DQ_10
AN12
SB_DQ_11
AM11
SB_DQ_12
AT11
SB_DQ_13
AR11
SB_DQ_14
AM12
SB_DQ_15
AN11
SB_DQ_16
AR5
SB_DQ_17
AR6
SB_DQ_18
AM5
SB_DQ_19
AM6
SB_DQ_20
AT5
SB_DQ_21
AT6
SB_DQ_22
AN5
SB_DQ_23
AN6
SB_DQ_24
AJ 4
SB_DQ_25
AK4
SB_DQ_26
AJ 1
SB_DQ_27
AJ 2
SB_DQ_38
L5
SB_DQ_39
M5
SB_DQ_40
G7
SB_DQ_41
J 8
SB_DQ_42
G8
SB_DQ_45
J 9
SB_DQ_46
G10
SB_DQ_47
J10
SB_DQ_48
A8
SB_DQ_49
B8
SB_DQ_50
A9
SB_DQ_51
B9
SB_DQ_52
D8
SB_DQ_53
E8
SB_DQ_54
D9
SB_DQ_55
E9
SB_DQ_56
E15
SB_DQ_57
D15
SB_DQ_58
A15
SB_DQ_59
B15
SB_DQ_60
E14
SB_DQ_61
D14
SB_DQ_62
A14
SB_DQ_63
B14
SB_DQ_35
M4
SB_DQ_33
M2
SB_DQ_31
AK1
SB_DQ_30
AK2
SB_DQ_29
AN1
SB_DQ_28
AM1
SB_DQ_44
J 7
SB_DQ_43
G9
RSVD
AG8
SB_CKE_1
AG10
SB_CKE_0
AF10
SB_CKN0
Y 4
SB_CKN1
Y 3
SB_CKN2
Y 2
SB_CKN3
Y 1
SB_CKP0
AA4
SB_CKP1
AA3
SB_CKP2
AA2
SB_CKP3
AA1
R495
*1K_04
VDDQ
M_A_CKE1 9
VDDQ
VDDQ
M_A_DQS#[7:0] 9,10
M_A_CS#1 9
M_A_CS#0 9
M_A_CLK_DDR#0 9
M_A_CLK_DDR0 9
M_A_CKE0 9
M_A_DQS[7:0] 9,10
M_A_ODT0 9
M_A_ODT1 9
M_B_CKE0 12
M_B_CLK_DDR#1 12
M_B_CLK_DDR1 12
M_B_CKE1 12
M_B_ODT1 12
M_B_CLK_DDR#0 12
M_B_CLK_DDR0 12
M_B_CS#1 12
M_B_CS#0 12
M_B_ODT0 12
M_A_CS#2 10
M_A_CKE3 10
M_A_CKE2 10
M_A_ODT2 10
M_A_ODT3 10
M_A_CS#3 10
M_B_CKE2 11
M_B_CLK_DDR#3 11
M_B_CLK_DDR3 11
M_B_CKE3 11
M_B_CS#2 11
M_B_CLK_DDR#2 11
M_B_CLK_DDR2 11
M_B_ODT2 11
M_B_ODT3 11
M_B_CS#3 11
M_A_CLK_DDR#3 10
M_A_CLK_DDR3 10
M_A_A[15:0] 9,10
M_A_CLK_DDR1 9
M_A_CLK_DDR#2 10
M_A_CLK_DDR2 10
M_A_BS2 9,10
M_A_BS1 9,10
M_A_BS0 9,10
M_A_CLK_DDR#1 9
M_A_CAS# 9,10
M_A_WE# 9,10
M_A_RAS# 9,10
M_B_BS1 11,12
M_B_BS0 11,12
M_B_B[15:0] 11,12
M_B_RAS# 11,12
M_B_BS2 11,12
M_B_CAS# 11,12
MVREF_DQ_DIMMA 9,10
DRAMRST_CNTRL 3,20
M_B_WE# 11,12
M_A_DQ[63:0]
9,10
M_B_DQS#[7:0] 11,12
M_B_DQS[7:0] 11,12
MVREF_DQ_DIMMB 11,12
VDDQ
3,6,9,10,11,12,30,39
SM_VREF_R 9,11
M_B_DQ[63:0]
11,12
SM_VREF
RSVD_AG8
M_A_A5
M_A_A7
M_A_A8
M_A_A9
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A6
M_A_A12
M_A_A11
M_A_A13
M_A_A14
M_A_A15
All VREF traces should be at least 20 mils wide
and 20 mils spacing to other singals/planes
DRAMRST_CNTRL
M_A_A10
M_A_DQ29
M_A_DQ4
M_A_DQ3
M_A_DQ2
M_A_DQ1
M_A_DQ35
M_A_DQ34
M_A_DQ33
M_A_DQ32
M_A_DQ31
M_A_DQ30
M_A_DQ41
M_A_DQ40
M_A_DQ39
M_A_DQ37
M_A_DQ36
M_A_DQ46
M_A_DQ45
M_A_DQ44
M_A_DQ43
M_A_DQ42
M_A_DQ51
M_A_DQ28
M_A_DQ50
M_A_DQ49
M_A_DQ38
M_A_DQ47
M_A_DQ48
M_A_DQ55
M_A_DQ54
M_A_DQ53
M_A_DQ52
M_A_DQ58
M_A_DQ57
M_A_DQ56
M_A_DQ6
M_A_DQ5
M_A_DQ7
M_A_DQ59
M_A_DQ63
M_A_DQ62
M_A_DQ61
M_A_DQ60
M_A_DQ12
M_A_DQ11
M_A_DQ9
M_A_DQ8
M_A_DQ18
M_A_DQ17
M_A_DQ16
M_A_DQ15
M_A_DQ14
M_A_DQ13
M_A_DQ22
M_A_DQ21
M_A_DQ10
M_A_DQ19
M_A_DQ27
M_A_DQ26
M_A_DQ25
M_A_DQ24
M_A_DQ23
M_A_DQ0
M_B_DQ50
M_B_DQ49
M_B_DQ48
M_B_DQ47
M_A_DQ20
M_B_DQ55
M_B_DQ54
M_B_DQ53
M_B_DQ52
M_B_DQ51
M_B_DQ61
M_B_DQ60
M_B_DQ59
M_B_DQ58
M_B_DQ57
M_B_DQ56
M_B_DQ1
M_B_DQ12
M_B_DQ11
M_B_DQ63
M_B_DQ62
M_B_DQ6
M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ2
M_B_DQ10
M_B_DQ9
M_B_DQ8
M_B_DQ7
M_B_DQ17
M_B_DQ16
M_B_DQ15
M_B_DQ14
M_B_DQ13
M_B_DQ0
M_B_DQ22
M_B_DQ21
M_B_DQ20
M_B_DQ19
M_B_DQ18
M_B_DQ27
M_B_DQ26
M_B_DQ25
M_B_DQ24
M_B_DQ23
M_B_DQ33
M_B_DQ32
M_B_DQ31
M_B_DQ30
M_B_DQ29
M_B_DQ28
M_B_DQ38
M_B_DQ37
M_B_DQ36
M_B_DQ35
M_B_DQ34
M_B_DQ43
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQ39
M_A_CKE1
M_A_CLK_DDR1
M_A_CLK_DDR#1
M_B_DQ46
M_B_DQ45
M_B_DQ44
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_CS#1
M_A_CS#0
M_A_DQS#0
M_A_DQS#2
M_A_DQS#1
M_A_DQS#3
M_A_DQS#4
M_A_ODT0
M_A_CLK_DDR#0
M_A_CLK_DDR0
M_A_CKE0
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_ODT1
M_A_BS0
M_A_DQS0
M_A_DQS2
M_A_DQS1
M_A_DQS3
M_A_WE#
M_A_RAS#
M_A_CAS#
M_A_BS2
M_A_BS1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#6
M_B_DQS#5
M_B_DQS5
M_B_DQS#7
M_B_DQS#0
M_B_DQS#1
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS6
M_B_CKE1
M_B_CLK_DDR#1
M_B_CLK_DDR1
M_B_DQS7
M_B_DQS0
M_B_ODT1
M_B_ODT0
M_B_CLK_DDR#0
M_B_CLK_DDR0
M_B_CKE0
M_A_CLK_DDR2
M_A_CLK_DDR#2
M_A_CKE2
M_B_CS#1
M_B_CS#0
M_A_ODT2
M_A_CS#3
M_A_CS#2
M_A_CLK_DDR3
M_A_CLK_DDR#3
M_A_CKE3
M_B_CKE2
M_B_CKE3
M_B_CLK_DDR#3
M_B_CLK_DDR3
M_A_ODT3
M_B_ODT2
M_B_CS#3
M_B_CS#2
M_B_CLK_DDR#2
M_B_CLK_DDR2
M_B_ODT3
MVREF_DQ_DIMMB
¾aDIMMºÝÂ\©ñ
SA_DIMM_VREFDQ
MVREF_DQ_DIMMA
Haswell Processor 3/7 ( DDR3L )
M_B_CAS#
M_B_BS2
M_B_BS0
M_B_BS1
M_B_WE#
M_B_RAS#
Sheet 4 of 60
Processor 3/7
Содержание p157sm
Страница 1: ...P170SM SERVICE MANUAL ...
Страница 2: ......
Страница 3: ...Preface I Preface Notebook Computer P170SM Service Manual ...
Страница 24: ...Introduction 1 12 1 Introduction ...
Страница 55: ...Part Lists Top with Fingerprint A 3 A Part Lists Top with Fingerprint Figure A 1 Top with Fingerprint ...
Страница 56: ...Part Lists A 4 Top without Fingerprint A Part Lists Top without Fingerprint Figure A 2 Top without Fingerprint ...
Страница 57: ...Part Lists Bottom N14E GS A 5 A Part Lists Bottom N14E GS Figure A 3 Bottom N14E GS ...
Страница 58: ...Part Lists A 6 Bottom N14E GTX A Part Lists Bottom N14E GTX Figure A 4 Bottom N14E GTX ...
Страница 59: ...Part Lists LCD A 7 A Part Lists LCD Figure A 5 LCD ...
Страница 60: ...Part Lists A 8 COMBO A Part Lists COMBO Figure A 6 COMBO ...
Страница 61: ...Part Lists DVD Dual Drive A 9 A Part Lists DVD Dual Drive Figure A 7 DVD Dual Drive ...
Страница 62: ...Part Lists A 10 A Part Lists ...
Страница 124: ...Schematic Diagrams B 62 B Schematic Diagrams ...