Clevo NL40CU, Руководство по обслуживанию

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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Xjoepxt! 9! 4H`QPXFSFO! Bmxbzt! ij/
>120 mil >120 mil
3G POWER
ADD R386,Q23 Solution For
PDA
BUG-When Battery discharge
t o
shutdown, the CMOS
sometimes
loss.
8 / 1 2 R F
⡆ ≈
暨冯 M .2 ⎴朊
3G CARD
80 mils
80 mils
CURRENT 2A
㗪
,DON'T DROP BELOW 3.135V
NGFF_B
ᶵ 㓗 ㎜ GP S ≇ 傥 ẍ PULL DOWN
4G-LTE module 䘬 USB 3.0 interface 婳 ᶨ ⭂ 天 ㍍⇘ ㊯⭂ 䁢 USB 3.0 䘬 S SIC Po r t.
SKYLAKE
㚨 㕘 䘬
H
䲣↿ 䘬
EDS & D esign guide (Rev 1 . 0 )
⶚䴻㰺 㚱 ⭂佑
SSI C
port
炻 Ữ
SKYLAK E Y U
婳 ㍍⇘
US B3.0 POR T 2 .
䔞 ἧ 䓐䘬 SKYLAK E-H pltaf o rm 㗪 炻 4 G - LT E 䘬 U S B 3 . 0
i n t e r f a c e
⎗ ẍ 冒 埴 ⭂佑 忋 ㍍ ⇘
S k y l a k e - H
ả ỽ 䘬ᶨ ᾳ
U S B 3 . 0
䘬
P o r t
⯙⎗ẍḮ ˤ
For 15" OPTION
20190619 layout swap
20190619 layout swap
M.2 3G/4G-LTE module SIM Detect Pin 66 炻
internal 1.8V with Pull-up
pin66 H= USIM present
pin66 L= USIM absent
D02 unstuff
D02 unstuff
D02 stuff
BODYSAR_N
USB3_4TXN_L
USB3_4TXP_L
USB3_4RXP_L
USB3_4RXN_L
USB_PN4_L
USB_PP4_L
USB3_4TXP_C
USB3_4TXN_C
UIM_DATA
UIM_PW R
UIM_RST
UIM_CLK
PW R_ON_OFF
M2_SIM_DET
3G_W AKE#
PW R_ON_OFF
3G_PW R_EN
M2_SIM_DET
SIM_DET
3.3V
3G_3.3V
GND
3G_3.3V
3G_3.3V
3G_3.3V
3G_PW R_EN 24
3G_EN 24
USB_PP4 7
USB_PN4 7
USB3_4TXN 7
USB3_4RXP 7
USB3_4RXN 7
USB3_4TXP 7
UIM_DATA 29
UIM_CLK 29
UIM_RST 29
UIM_PW R 29
SIM_DET 29
3.3V 2,6,9,17,18,19,20,22,26,29,30,33,35,36,37
Title
Size Document Number R e v
Date: Sheet o f
6-71-NL4C0-D02
D02
[27] 3G/LTE ( B KEY )
A3
27 44 Friday, August 16, 2019
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NL40CU
Title
Size Document Number R e v
Date: Sheet o f
6-71-NL4C0-D02
D02
[27] 3G/LTE ( B KEY )
A3
27 44 Friday, August 16, 2019
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NL40CU
Title
Size Document Number R e v
Date: Sheet o f
6-71-NL4C0-D02
D02
[27] 3G/LTE ( B KEY )
A3
27 44 Friday, August 16, 2019
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NL40CU
R112
*100_06
3G/LTE
R56 100K_04
3G/LTE
+ C387 EEFCX0J221YR
220u,6.3V,ESR=15mΩ,H=1.9mm
3G/LTE
3G/LTE
C69
1u_
6.3V
_X5R_02
3G
/LTE
C140
0.1u_6.3V_X5R_02
3G/LTE
C175 0.1u_10V_X7R_04
3G/LTE
R130
*12K_06
3G/LTE
+
C398
EEFCX0J221YR
220u,6.3V,ESR=15mΩ,H=1.9mm
3G/LTE
C106
0.1u_6.3V_X5R_02
3G/LTE
L19
*W CM2012F2S-SHORT
3G/LTE
PCB Footprint = W CM2012F2S-short
1
4
2
3
R57
20K_1%_04
3G/LTE
C185
0.1u_6.3V_X5R_02
3G/LTE
R75 0_04
3G/LTE
C119
470p_50V_X7R_04
3G/LTE
L2
*W CM2012F2S-SHORT
3G/LTE
1
4
2
3
C70 1u_6.3V_X5R_02
3G/LTE
C174 0.1u_10V_X7R_04
3G/LTE
C186
10u_6.3V_X5R_04
3G/LTE
R55 0_04
3G/LTE
B KEY
J_3G1
NASB0-S6701-TSH4
3G/LTE
PCB Footprint = 213baaa32xa
P/N = 6-21-84KY0-075
HEIGHT = 3mm
SUSCLK(32Khz)(O)
68
CLKREQ#(IO)
52
GND9
71
REFCLKP
55
REFCLKN
53
PEWake#(IO)
54
CONFIG_1
69
PETp1/USB3.0-Tx+/SSIC-TxP
37
PETn1/USB3.0-Tx-/SSIC-TxN
35
ANTCTL0(I)1.8V
59
PERp1/USB3.0-Rx+/SSIC-RxP
31
PERn1/USB3.0-Rx-/SSIC-RxN
29
GND8
57
GND3
27
GPIO_9/DAS/DSS#(I)(OD)
10
GND10
73
GPIO_8(IO)1.8V
28
UIM_RESET(I)
30
3.3V2
70
UIM_CLK(I)
32
UIM_DATA(IO)
34
UIM_PWR(I)
36
Reset#(O)1.8V
67
SIM Detect(O)
66
NC1
58
GPIO_0(IO)1.8V
40
NC0
56
USB_D-
9
USB_D+
7
DEVSLP(O)
38
COEX1(I/O)1.8V
64
PERST#(O)
50
COEX3(I/O)1.8V
60
GND7
51
W_DISABLE#1(O)
8
GPIO_5(IO)1.8V
20
3.3V0
2
GPIO_11(IO)1.8V
23
CONFIG_3
1
Full_Card_Power_Off#(O)1.8V
6
GND0
3
CONFIG_0
21
3.3V1
4
GND1
5
GND2
11
GPIO_6(IO)1.8V
22
GPIO_7(IO)1.8V
24
GPIO_10(IO)1.8V
26
GPIO_12(IO)1.8V
25
GND4
33
PERp0/SATA-B-
43
PETp0/SATA-A+
49
PETn0/SATA-A-
47
PERn0/SATA-B+
41
GND5
39
GND6
45
ANTCTL1(I)1.8V
61
ANTCTL2(I)1.8V
63
ANTCTL3(I)1.8V
65
CONFIG_2
75
GPIO_1(IO)1.8V
42
GPIO_2(IO)1.8V
44
GPIO_3(IO)1.8V
46
GPIO_4(IO)1.8V
48
COEX2(I/O)1.8V
62
3.3V3
72
3.3V4
74
L18 *W CM2012F2S-SHORT
3G/LTE
1
4
2
3
Q6
AO3415
3G/LTE
G
D S
R113 *0603_short
3G/LTE
S
D
G
Q5A
MTDK5S6R
3G/LTE
2
6
1
R131 10K_04 3G/LTE
3G/LTE
C86 0.1u_6.3V_X5R_02 3G/LTE
R70
*100K_04
3G/LTE
R62
10_06
3G/LTE
R400 *0_04
3G/LTE
Q7
*2SK3018S3
3G/LTE
G
D
S
S
D
G
Q5B
MTDK5S6R
3G/LTE
5
3
4
C105 0.1u_6.3V_X5R_02 3G/LTE
Sheet 27 of 43
3G/LTE
Schematic Diagrams
B - 28 3G/LTE
B.Schematic Diagrams
3G/LTE