Schematic Diagrams
Calistoga 2/5 B - 7
B.Schematic Diagrams
Calistoga 2/5
Sheet 6 of 38
Calistoga 2/5
CLK_DREFSS 2
SDVOB_RED# 11
C62
1U_X5R_06
R270
10K_04
DMI_RXP[3:0] 15
R249
5.6K_04
R250
*2.2K_04
MCH_CFG13
MCH_CFG12
PM_EXTTS1#
6
MCH_CFG9
R268
39.2_1%_06
MCH_CFG9 (PCIE Graphics Lane)
1.8V
DMI_RXN1
MCH_CFG11
CLK_DREF 2
MCH_CFG11
R282
10K_04
DMI_TXP[ 3:0] 15
M_VREF_MCH
Enable
R269
*1K_04
M_ODT0
10
PEG_COMP
MCH_CFG9
Reverse Lane
PM_EXTTS0#
10
MCH_CFG7
MCH_CFG13
R81
150_1%_06
CLK_DREFSS# 2
M_CLK_DDR1 10
M_RCOMPP
C135
*22P_50V_04
MCH_CFG20
DMIx4
DELAY _PWRGD
16,30
0.1uF should be placed
100mils or less from GMCH
pin.
DMI_TXP1
MCH_CFG19
Calistoga Strapping
2.5VS
M_CS3#
10
DAC_DDCADATA
13
MCH_CFG7
MCH_CFG5
Lanes reversed
DMI_TXP3
MCH_CFG5
R278
10K_04
Layout Notice:
CLK_PCIE_3GPLL# 2
R271
10K_04
SDVO and PCIe x1 are operating
sim ultaneously via the PEG port
M_CS1#
10
M_CLK_DDR0 10
PM_EXTTS1#_R
DMI_TXN3
PM_EXTTS0#
C416 0.1U_16V_04
R244
80.6_1%_06
R246 100_04
RSVD
M_CLK_DDR0#
DMI_RXN[3:0] 15
R27
1K_1%_06
3.3VS
DMI_RXP1
M_CLK_DDR0# 10
MCH_BSEL0
5
SDVO_STALL 11
MCH_CFG13
M_CLK_DDR2 10
M_ODT2
10
MCH_CFG11 (PSB 4X CLK ENABL)
MCH_CFG18 (VCC select)
DAC_BLUE
13
DAC_GREEN
13
DMI_TXN0
DMI_TXN2
C101 0.1U_16V_04
R283
*0_04
M_CKE0
10
M_RCOMPN
M_CLK_DDR2#
LV
DS
P
C
I
-
EX
PR
ES
S GR
AP
HI
CS
TV
VG
A
U3C
CALISTOGA
D40
D38
F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y 34
AA38
AB34
AC38
D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y 38
AA34
AB38
F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y 36
AA40
AB36
AC40
D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y 40
AA36
AB40
J30
H30
H29
G26
G25
B38
C35
F32
C33
C32
A33
A32
C37
B35
A37
B37
B34
A36
E27
E26
G30
D30
F29
F30
D29
F28
D32
A16
C18
A19
J20
B16
B18
B19
E23
D23
C26
C25
C22
B22
G23
J22
A21
B21
H23
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
L_BKLTEN
L_CLKCTLA
L_CLKCTLB
L_DDC_CLK
L_DDC_DATA
L_IBG
L_VBG
L_VDDEN
L_VREFH
L_VREFL
LA_CLK#
LA_CLK
LA_DATA#_0
LA_DATA#_1
LA_DATA#_2
LA_DATA_0
LA_DATA_1
LA_DATA_2
LB_CLK#
LB_CLK
LB_DATA#_0
LB_DATA#_1
LB_DATA#_2
LB_DATA_0
LB_DATA_1
LB_DATA_2
L_BKLTCTL
TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
CRT_BLUE
CRT_BLUE#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_GREEN
CRT_GREEN#
CRT_HSY NC
CRT_IREF
CRT_RED
CRT_RED#
CRT_VSY NC
1.5VS
DAC_HSY NC
13
SDVO_STALL# 11
MAX=0.5"
DMI_RXN0
M_CLK_DDR3
C411 0.1U_16V_04
DAC_VSY NC
13
M_CLK_DDR3 10
M_CLK_DDR3# 10
DMI_RXN3
R284
255_1%_06
3.3VS
MCH_CFG12
CLK_PCIE_3GPLL 2
M_CLK_DDR2# 10
SDVOB_BLUE 11
LOW
MCH_ICH_SY NC#
15
M_CKE1
10
R251
5.6K_04
8X ENABLE
MCH_CFG16
DMIx2
DMI_TXN[3:0] 15
MCH_CLKREQ#
2
C106 0.1U_16V_04
R275
10K_04
C414 0.1U_16V_04
M_CLK_DDR1# 10
MCH_CFG12
R276
*0_04
MCH_CFG16 (FSB Dynam ic ODT)
SDVOB_CLKN 11
C136
*22P_50V_04
DAC_RED
13
R281
39.2_1%_06
Mobile CPU
MCH_BSEL[2..0]
001 = PSB533
011 = PSB667
Others =
Reserved
M_RCOMPP
R277
0_04
DAC_DDCACLK
13
PM_THRMTRIP#
3,14,27
DMI_RXP2
R252
*2.2K_04
DEL 8/1
R274
10K_04
R248
*2.2K_04
C134
*22P_50V_04
M_CLK_DDR3#
MCH_CFG20 (PCIe backward
inerpoerability m ode)
M_CKE2
10
DMI_TXN1
PM_EXTTS1#_R
SDVO_CTRLCLK
MCH_CFG16
DMI_TXP2
R254
*2.2K_04
PM_DPRSLPVR
16,30
NB_RSTIN#
R83
150_1%_06
R259
*2.2K_04
SDVOB_RED 11
MCH_CFG19 (DMI Lane reversal)
3.3VS
M_CS0#
10
MCH_CFG5
R272
*1K_04
DMI_TXN1
M_CS2#
10
1.8V
CLK_DREF# 2
R245
80.6_1%_06
1.05V
SDVO_CTRLDATA
11
R253
*0_04
Normal operation
1.5V
MCH_BSEL2
5
SDVOB_CLKP 11
M_CLK_DDR0
MCH_CFG7 (CPU Strap)
NB_RSTIN#
R273
*1K_04
M_ODT3
10
M_ODT1
10
1.5VS
R266
*2.2K_04
RSVD
DMI_TXP0
MCH_CFG19
R82
150_1%_06
1.5VS
DMI_RXN2
C70
0.01U_16V_04
SDVO_CTRLCLK
11
C419 0.1U_16V_04
HIGH
M_RCOMPN
C103 0.1U_16V_04
MCH_CFG18
PM_EXTTS0#
PM
MI
SC
NC
DD
R
MU
XI
NG
CL
K
DM
I
CF
G
RS
VD
U3B
CALISTOGA
D1
C41
C1
BA41
BA40
BA39
BA3
BA2
BA1
B41
B2
AY41
AY 1
AW41
AW1
A40
A4
A39
A3
H28
H27
AY 35
AR1
AW7
AW40
AW35
AT1
AY 7
AY 40
AU20
AT20
BA29
AY 29
AW13
AW12
AY 21
AW21
AL20
AF10
BA13
BA12
AY 20
AU21
AV9
AT9
AK1
AK41
J25
K27
J26
K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
G28
F25
H26
G6
AH33
AH34
A27
A26
C40
D41
AE35
AF39
AG35
AH39
AC35
AE39
AF35
AG39
AE37
AF41
AG37
AH41
AC37
AE41
AF37
AG41
AF33
AG33
T32
R32
AG11
AF11
K28
J19
H32
F3
F7
H7
K30
J29
A41
A35
A34
D28
D27
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
SDVO_CTRLCLK
SDVO_CTRLDATA
SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3
SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK#_3
SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_OCDCOMP_0
SM_OCDCOMP_1
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP#
SM_RCOMP
SM_VREF_0
SM_VREF_1
CFG_18
CFG_19
CFG_20
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
PM_BMBUSY #
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
RSTIN#
D_REFCLKIN#
D_REFCLKIN
D_REFSSCLKIN#
D_REFSSCLKIN
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
G_CLKIN#
G_CLKIN
RSVD_1
RSVD_2
RSVD_5
RSVD_6
ICH_SY NC#
RSVD_8
CLK_REQ0#
RSVD_3
RSVD_4
RSVD_7
TV_DCONSEL0
TV_DCONSEL1
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
R255
1.5K_04
Normal
MCH_CFG18
R256
*2.2K_04
Disable
CFG[17..3] has
internal pull up
CFG[20..18] has
internal pull down
SDVOB_GREEN 11
M_CLK_DDR1
R265
24.9_1%_06
DMI_RXP0
SDVOB_GREEN# 11
M_CLK_DDR1#
SDVO_CTRLDATA
PLT_RST#
11,15,16,18,19
MCH_BSEL1
5
PM_EXTTS1#_R
DMI_RXP3
Minimize REFSET
routing length and
shield with VSS
PM_BMBUSY #
16
MCH_CFG20
C102 0.1U_16V_04
R247
0_04
M_CKE3
10
Only SDVO or PCIe
x1 is operational
3.3VS
SDVOB_BLUE# 11
PM_EXTTS0#
M_CLK_DDR2
PM_EXTTS1#
R29
1K_1%_06
Содержание L295N
Страница 1: ......
Страница 2: ......
Страница 3: ...Preface I Preface LCD Computer L295N L297N Series Service Manual...
Страница 20: ...Introduction 1 12 1 Introduction...
Страница 39: ...Part Lists L295N Base A 3 A Part Lists L295N Base Figure A 1 L295N Base 480MM L297T...
Страница 40: ...Part Lists A 4 L295N Bracket AU A Part Lists L295N Bracket AU Figure A 2 L295N Bracket AU...
Страница 41: ...Part Lists L295N Front A 5 A Part Lists L295N Front Figure A 3 L295N Front...
Страница 43: ...Part Lists L295N Combo Drive A 7 A Part Lists L295N Combo Drive Figure A 5 L295N Combo Drive...
Страница 44: ...Part Lists A 8 L295N DVD RW Drive A Part Lists L295N DVD RW Drive L295N Figure A 6 L295N DVD RW Drive...
Страница 45: ...Part Lists L295N FDD A 9 A Part Lists L295N FDD Figure A 7 L295N FDD...
Страница 46: ...Part Lists A 10 L295N HDD A Part Lists L295N HDD Figure A 8 L295N HDD...
Страница 47: ...Part Lists L297N Base A 11 A Part Lists L297N Base Figure A 1 L297N Base 480MM L297T...
Страница 51: ...Part Lists L297N Front A 15 A Part Lists L297N Front Figure A 5 L297N Front...
Страница 52: ...Part Lists A 16 L297N Combo Drive A Part Lists L297N Combo Drive Figure A 6 L297N Combo Drive...
Страница 53: ...Part Lists L297N DVD RW Drive A 17 A Part Lists L297N DVD RW Drive Figure A 7 L297N DVD RW Drive...
Страница 54: ...Part Lists A 18 L297N FDD A Part Lists L297N FDD Figure A 8 L297N FDD...
Страница 55: ...Part Lists L297N HDD A 19 A Part Lists L297N HDD Figure A 9 L297N HDD...
Страница 56: ...Part Lists A 20 Part Lists...
Страница 96: ...Schematic Diagrams B 40 B Schematic Diagrams...