VCC-G20S20B
Rev.900-740-33
©2014 CIS Corporation. All rights reserved.
7
4.2. Camera Output Signal Specification
Video output
Effective output: 1360(H) x 1040(V) at full frame scan.
Sync signals
Input /Output
HD/VD Input signal level: 2
～
5Vp-p, TTL input
Iput impedance: 10kΩ/75Ω (Refer to the below, SW selection)
Allowable frequency deviation:
±
3%
Phase difference: HD/VD: under 0±5μs
Jitter: under 20ns
Referential Drawing
HD/VD
75
10K
SW
100
4.7K
33K
47pF
3.3V
IN/OUT
CMOS
5V
HD/VD/WEN output
CMOS (74VHC04 equivalent)
Output impedance:
100Ω
HD/VD/WEN output signal level
Low 0.5V (Max), High 4V (Min)
Trigger input
Polarity: Positive
Input signal level: Low 0.5V(Max), High 2.5
～
5V
Input impedance: 1kΩ
Trigger input width: 4μs
～
250ms
Referential Drawing
Trigger IN
TTL
5V
4.7K
47pF
1K
No Mount
5V
Scan IN input
Scan switching with
No.9 pin.
Input signal level: Low 0.5V (Max), High 2.5
～
5V
Input impedance: 10kΩ
(Pull Up)
Referential Drawing
Video signals
VS output 1.0V (p-p), Sync. Negative, 75Ω unbalanced, DC connect
White clip level: 840 ± 70 mVp-p
Setup level: 25 ± 15 mVp-p (Gain 0dB)
SYNC level: 290 ± 50 mVp-p
Partial IN
TTL
5V
4.7k
47pF
No Mount
10k
5 V
