6-1
Copyright 2012 Cirrus Logic, Inc.
DS886DB9
Introduction
CDB47xxx User’s Manual
Chapter 6
CDB47xxx Schematics
6.1 Introduction
The schematics included in this document are the original Revision A schematics of the CDB47xxx and
reflects the board as it was manufactured. Newer schematics may be available that incorporate feature
additions or corrections, and may not match Rev. A hardware.
6.2 CDB47xxS Single-Ended Schematic Descriptions
6.2.1 CDB47xxxS Block Diagram
shows the CDB47xxxS block diagram.
6.2.2 Daughtercard Connectors
shows the schematic for the daughtercard connectors on the CDB47xxxS board.
The digital connector (J2) carries the following signals:
• Serial Control signals for host control of the CS470xx
• Serial Control signals from CS470xx to the SPI Flash and I²C EEPROM
• Serial Audio Data and Clocks going to the DAI of the CS470xx
• Serial Audio Data and Clocks coming from the DAO of the CS470xx
The analog connector (J3) carries the following signals:
• 8 channels of line-level analog from the CS470xx DACs - can support differential or single-ended
signaling
• 12 channels of line-level analog to the CS470xx ADCs - can support differential or single-ended
signaling
The microphone input is routed to AIN_6A. The AIN_6B channel can be used for mono line-level input.
6.2.3 Digital Audio and Control Connectors
shows the schematics for the digital audio and control connectors on the CDB47xxxS board.
The audio input connectors consist of the following:
• 1 RCA jack for coaxial S/PDIF input
• 1 optical jack for optical S/PDIF input
• 1 2x10 header for serial audio data (I
2
S)