2
DS723DB1
CDB43L21
TABLE OF CONTENTS
1.1 Power ............................................................................................................................................... 4
1.2 Grounding and Power Supply Decoupling ....................................................................................... 4
1.3 FPGA ............................................................................................................................................... 4
1.4 CS43L21 .......................................................................................................................................... 4
1.5 CS8415 Digital Audio Receiver ........................................................................................................ 5
1.6 Oscillator .......................................................................................................................................... 5
1.7 I/O Stake Headers ........................................................................................................................... 5
1.8 Analog Outputs ................................................................................................................................ 5
1.9 Stand-Alone Switches ...................................................................................................................... 6
1.10 Control Port Connectors ................................................................................................................ 6
2.1 General Configuration Tab ............................................................................................................... 8
2.2 DAC Volume Controls Tab ............................................................................................................... 9
2.3 Register Maps Tab ......................................................................................................................... 10
4. SYSTEM CONNECTIONS .................................................................................................................... 14
5. JUMPER SETTINGS ............................................................................................................................ 14
6. CDB43L21 BLOCK DIAGRAM ............................................................................................................ 15
7. CS43L21 SCHEMATICS ...................................................................................................................... 16
8. CDB43L21 LAYOUT ............................................................................................................................ 22
9. ERRATA ............................................................................................................................................... 25
10. REVISION HISTORY .......................................................................................................................... 25
1. SYSTEM OVERVIEW ............................................................................................................................. 4
1.1 Power ............................................................................................................................................... 4
1.2 Grounding and Power Supply Decoupling ....................................................................................... 4
1.3 FPGA ............................................................................................................................................... 4
1.4 CS43L21 .......................................................................................................................................... 4
1.5 CS8415 Digital Audio Receiver ........................................................................................................ 5
1.6 Oscillator .......................................................................................................................................... 5
1.7 I/O Stake Headers ........................................................................................................................... 5
1.8 Analog Outputs ................................................................................................................................ 5
1.9 Stand-Alone Switches ...................................................................................................................... 6
1.10 Control Port Connectors ................................................................................................................ 6
2.1 General Configuration Tab ............................................................................................................... 8
2.2 DAC Volume Controls Tab ............................................................................................................... 9
2.3 Register Maps Tab ......................................................................................................................... 10
4. SYSTEM CONNECTIONS .................................................................................................................... 14
5. JUMPER SETTINGS ............................................................................................................................ 14
6. CDB43L21 BLOCK DIAGRAM ............................................................................................................ 15
7. CS43L21 SCHEMATICS ...................................................................................................................... 16
8. CDB43L21 LAYOUT ............................................................................................................................ 22
Содержание CDB43L21
Страница 16: ...16 DS723DB1 CDB43L21 7 CS43L21 SCHEMATICS Figure 10 CS43L21 and Analog I O Schematic Sheet 1 ...
Страница 17: ...DS723DB1 17 CDB43L21 Figure 11 S PDIF I O Schematic Sheet 2 ...
Страница 18: ...18 DS723DB1 CDB43L21 Figure 12 FPGA Schematic Sheet 3 ...
Страница 19: ...DS723DB1 19 CDB43L21 Figure 13 Level Shifters I O Stake Header Schematic Sheet 4 ...
Страница 20: ...20 DS723DB1 CDB43L21 Figure 14 Control Port I O Schematic Sheet 5 ...
Страница 21: ...DS723DB1 21 CDB43L21 Figure 15 Power Schematic Sheet 6 ...
Страница 22: ...22 DS723DB1 CDB43L21 8 CDB43L21 LAYOUT Figure 16 Silk Screen CDB43L21 CS43L21 CS43L21 CS43L21 ...
Страница 23: ...DS723DB1 23 CDB43L21 Figure 17 Top Side Layer ...
Страница 24: ...24 DS723DB1 CDB43L21 Figure 18 Bottom Side Layer ...