PVS8 Hardware Interface Overview
3.2 Power Supply
25
PVS8_HIO_v03.000a
Page 20 of 37
2013-04-08
Confidential / Preliminary
3.2
Power Supply
PVS8 needs to be connected to a power supply at the SMT application interface - 6 lines each
BATT+ and GND. There are three separate voltage domains for BATT+:
•
BATT+_PA1 with 2 lines for the first power amplifier supply
•
BATT+_PA2 with 2 lines for the second power amplifier supply
•
BATT+ with 2 lines for the general power management.
The main power supply from an external application has to be a single voltage source and has
to be expanded to three sub paths (star structure). Capacitors should be placed as close as
possible to the BATT+ pads.
Figure 2
shows two sample circuits (minimum requirement and
recommended alternative) for decoupling capacitors for BATT+.
Figure 2:
Decoupling capacitor(s) for BATT+
The power supply of PVS8 must be able to provide the peak current during the uplink transmis-
sion.
All key functions for supplying power to the device are handled by the power management IC.
It provides the following features:
•
Stabilizes
the supply voltages for the baseband using switching regulators and low drop lin-
ear voltage regulators.
•
Switches the module's power voltages for the power-up and -down procedures.
•
Delivers, across the VEXT line, a regulated voltage for an external application. This voltage
is not available in Power-down mode and can be reduced via AT command to save power.
BATT+
BATT+
BATT+_PA1
BATT+_PA2
2
2
2
Decoupling capacitor
e.g. 100…220µF
Ultra-low ESR
Module
GND
SMT interface
+
Minimum requirement
BATT+
2
2
2
Decoupling capacitors
e.g. 47µF X5R MLCC
3x
GND
BATT+
BATT+_PA1
BATT+_PA2
Module
SMT interface
Recommended alternative
