C&T Solution CT-CIB61, Руководство пользователя, Страница: 32 / 76

CT-CIB61 Intel® 3rd Generation Core™ Processor i7/i5/i3 COM Express Type 6 Module
３２
SPI-compatible flash devices. The SPI flash device can be up to 16MB
(128Mb). The SPI bus is clocked at either 20MHz, 25MHz, 33MHz or 50 MHz.
SPI devices selected should support one of these frequencies.
Signal I/O Description
SPI_CS# O
Chip select for Carrier Board SPI - may be
sourced from chipset SPI0 or SPI1
SPI_MISO I
Data in to Module from Carrier SPI
SPI_MISI O
Data out from Module to Carrier SPI
SPI_CLK O
Clock from Module to Carrier SPI
SPI_POWER O
Power supply for Carrier Board SPI – sourced
from Module – nominally 3.3V. The Module shall
provide a minimum of 100mA on SPI_POWER.
Carriers shall use less than 100ma of
SPI_POWER. SPI_POWER shall only be used
to power SPI devices on the Carrier Board.
BIOS_DIS[0:1]# I
Selection straps to determine the BIOS boot
device. The Carrier should only float these or pull
them low, please refer to the table below for
strapping option of BIOS disable signals.
BIOS_DIS1# BIOS_DIS0#
Chipset
SPI CS1#
Destination
Chipset
SPI CS0#
Destination
Carrier
SPI_CS#
SPI
Descriptor
BIOS
Entry Ref
Line
1 1 Module Module High
Module SPI0/SPI1 0
1 0 Module Module High
Module Carrier FWH 1
0 1 Module Carrier SPI0
Carrier SPI0/SPI1 2
0 0 Carrier Module SPI1
Module SPI1/SPI1 3
4.13 SMBus
The SMBus port is specified for system management functions. It is used on
the Module to manage system function such as reading the DRAM SPD
EEPROM and setting clock synthesizer parameters. If the SMBus is used on
the baseboard, then great care must be taken that no conflicts with the
on-Module SMBus devices occur. It may be useful for implementation on the
Carrier Board of standards such as Smart Battery. The maximum capacitance
on the Carrier Board shall not exceed 100pF.