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16
2Table 5.2 CCLINK Interface pin definition
QSFP-DD pins
Note
Internal processing of
pins
RX [8:1]P/N
SERDES signal input with AC coupling
capacitance inside
External AC coupling
capacitance is not
required
TX [8:1]P/N
SERDES signal output with AC coupling
capacitance inside
External AC coupling
capacitance is not
required
SCL
I2C interface clock signal of optical module
4.7 K
Ω
pull-up to 3.3 V
SDA
I2C interface data signal of optical module
4.7 K
Ω
pull-up to 3.3 V
ModPrsL
Optical module in position signal output
4.7 K
Ω
pull-up to 3.3 V
ModSelL
Selection signal of optical module, default pull-
up inside
1K
Ω
pull-down to
GND
ResetL
Reset signal, low level effective
4.7 K
Ω
pull-up to 3.3 V
IntL
Interrupt signal of optical module, OC gate, low
level indicates an interrupt signal
4.7 K
Ω
pull-up to 3.3 V
InitMode
Initialization mode
1K
Ω
pull-down to
GND
VccRx,VccRx1,Vcc1,Vcc2
VccTx ,VccTx1
Power signal
5.3
Power Interface Description
MLU-X1000 MLU extender Input Power Requirements:
3Table 5.3 MLU-X1000 Input Power Supply Specifications
Input voltage
Max. Input Current
AC 100-127V,60/50Hz
9.85 A-12.5A
AC 200-210V,60/50Hz
12.8-13.5A
AC 210-240V,60/50Hz
12.5-14.5A
DC 240V (China mainland only)
12.5A
MLU-X1000 MLU extender is able to reduce power consumption adjustment for instantaneous power
changes above the µs level. The power regulator can support power fluctuations within the ms level
(e.g .1.2 x TDP).