Document type:
Title:
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Revision:
User's Manual (MUT)
Mod. V977 16 Channel I/O Register (Status A)
27/08/2004
1
NPO:
Filename:
Number of pages: Page:
00118/01:V977X.MUTX/01
V977_REV1.DOC
21
15
Fig. 4.1: Mod. V977 Base address setting and output selection
4.3. Input set register
(Base a %0000 read/write)
Each register’s bit corresponds to one channel. If one bit is set to 1 the relevant channel
FLIP -FLOP (see § 3.1) is set, regardless the corresponding input connector’s status.
15 14 13
12 11
10 9
8 7 6
5 4 3 2 1 0
INPUT SET
In Multihit pattern unit mode, this register allows to obtain a “double hit” on a channel via
VME, by setting and then resetting two times the corresponding bit in this register.
This register default content is 0x0000.
2
7
3
5
6
4
1
0
A
B
C
D
E
F
8 9
Rotary switches for
VME address
selection
Base address bit <19~16>
Base address bit <23~20>
Base address bit <27~24>
Base address bit <31~28>
SW2
NIM
TTL
Jumper for
output type
selection
(SW2)
