1-26
1-126.
The phase modulator circuit accepts a mono or stereo signal from NAND gate U32D. The
signal is applied to a frequency doubler circuit consisting of integrated circuits U38A,
U38B, U38C, and U38D. The output of the frequency doubler is applied to the gates of
transistors Q6 and Q7. An IPM correction signal from the IPM wave shape circuit is
applied to the drains of Q6 and Q7.
1-127.
Transistors Q6 and Q7 function to produce a triangle-shaped waveform which is equal in
amplitude and out-of-phase with the IPM in the RF amplifier section. The output from
Q6 and Q7 is converted to a square-wave at U33C and U33D. The signal from
U33C/U33D is applied to a divider circuit consisting of integrated circuits U39A, U39B,
and U33E. The output of the divider is used to clock the RF carrier signal from the
frequency doubler circuit at latch U40. U40 outputs a phase compensated carrier
frequency to the RF drive circuit. Potentiometer R170 is provided to adjust the symmetry
of the RF carrier signal.
1-128.
RF DRIVE CIRCUIT.
The RF drive circuit consists of high/low side driver U46 and
transistors Q13 through Q22. Complementary phase compensated square-wave signals
at the carrier frequency are applied to U46. U46 outputs high and low driver signals for
application to a transistor array consisting of transistors Q13 through Q20. The
transistors output a +15 volt peak-to-peak square-wave signal at the carrier frequency
for application to the power block motherboard.
1-129.
EXCITER FAILURE DETECTOR CIRCUIT.
The exciter circuitry is equipped with an exciter
failure detector circuit. The circuit consists of integrated circuits U22B, U23A, and U23B.
Two signals are routed to the detector circuit: 1) the PWM control signal and 2) an RF
present signal from transistor Q8 and latch U40. The circuit is designed to output a
HIGH during the following conditions: 1) the loss of the PWM signal or 2) the loss of the
RF signal. The HIGH is routed to the circuitry on the controller circuit board.
1-130.
POWER SUPPLY CIRCUITS.
The exciter circuit board operates from three power
supplies: 1) a +5 volt supply, 2) a +15 volt supply, and 3) a -15 volt supply. Each supply is
equipped with a filter network. The +5 volt supply filter consists of inductor L1 and
capacitors C31/C32. The output of the filter is applied to: 1) +5 volt indicator DS1 and 2)
the exciter circuit board components. The +15 volt supply filter consists of inductor L2
and capacitors C34/C35. The output of the filter is applied to: 1) +15 volt indicator DS2
and 2) the exciter circuit board components. The -15 volt supply filter consists of inductor
L3 and capacitors C36/C37. The output of the filter is applied to: 1) -15 volt indicator
DS3 and 2) the exciter circuit board components.
1-131.
STEREO CIRCUIT BOARD.
1-132.
EQUALIZATION CIRCUITRY.
The stereo circuit board is equipped with two equalization
circuits: 1) equalization circuit 1 and 2) equalization circuit 2 (refer to Figure 1-3). The
circuits are designed to provide equalization for two antenna patterns such as: 1) a day
pattern and 2) a night pattern. The equalization circuits are identical and contain
identical left and right channel circuitry. Therefore, only the left channel of equalization
circuit 1 will be discussed.
