Biostar TFORCE 945P, Руководство по настройке BIOS

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TForce 945P BIOS Manual
4 Advanced Chipset Features
This submenu allows you to configure the specific features of the chipset installed on your
system. This chipset manage bus speeds and access to system memory resources, such as
DRAM. It also coordinates communications with the PCI bus. The default settings that came
with your system have been optimized and therefore should not be changed unless you are
suspicious that the settings have been changed incorrectly.
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Figure 4. Advanced Chipset Setup
SLP_S4# Assertion Width
This item sets the minimum assertion width of the SLP-S4# signal to
guarantee the DRAM has been safely power-cycled.
The Choices: 4 to 5 Sec (default), 3 to 4 Sec, 2 to 3 Sec ,1 to 2Sec.
System BIOS Cacheable
Selecting Enabled allows you caching of the system BIOS ROM at
F0000h~FFFFFh, resulting a better system performance. However, if any
program writes to this memory area, a system error may result.
The Choices: Enabled (default), Disabled.
Video BIOS Cacheable
Select Enabled allows caching of the video BIOS, resulting a better
system performance. However, if any program writes to this memory area,
a system error may result.
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