© BECOM Systems 2020
Hardware User Manual - CM-BF527
Last change: 26. March 2019/Version 7
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Pin No. Signal Name
Type
Function
30
TRST
I - 4k7 pull down
JTAG
31
EMU
O
JTAG
32
TMS
I
–
10k pull up
JTAG
33
TDO
O
JTAG
34
Bmode2
I -10k pull down
Boot mode
35
Bmode3
I -10k pull down
Boot mode
36
Bmode1
I -10k pull down
Boot mode
37
PG3 / SPIMISO / DR0SECA
IO
SPI, SPORT
38
PG7 / TMR3 / DR0PRIA / UART0TX
IO
Timer, SPORT, UART
39
PG1 / SPISS/ SPISEL1
IO
SPI slave select
40
PG12 / DMAR1 / UART1TXA / H_ACK
IO
UART
41
PPICLK / TMRCLK
IO
PPI clock, Timer clock
42
PG5 / TMR1 / PPIFS2
IO
Timer, PPI frame sync
43
PF15 / PPID15 / DR1SEC / UART1RX / TACI3
IO
PPI data, SPORT, UART
44
PF13 / PPID13 / TSCLK1 / SPISEL3 / CUD
IO
PPI data, SPORT
45
PF11 / PPID11 / TFS1 / CZM
IO
PPI data, SPORT
46
PF9 / PPID9 / RSCLK1 / SPISEL6
IO
PPI data, SPORT
47
PF7 / PPID7 / DR0SEC / ND_D7A / TACI1
IO
PPI data, SPORT, NAND
interface
48
PF5 / PPID5 / TSCLK0 / ND_D5A / TACLK1
IO
PPI data, SPORT, NAND
interface
49
PF3 / PPID3 / DT0PRI / ND_D3A
IO
PPI data, SPORT, NAND
interface
50
PF1 / PPID1 / RFS0 / ND_D1A
IO
PPI data, SPORT, NAND
interface
51
GND
Power
52
GND
Power
53
USB_VBUS
I/O
USB
54
PG10 / TMR6 / TSCLK0A / TACI6
IO
Timer, SPORT
55
NC
2)
or PH9/SPISEL5/ETxD2/HOST_D9/TACLK3 IO
–
10k pull down
56
SCL
O
I2C
57
PG0 / HWAIT
IO
Boot host wait
58
PH14/ND_CLE/ERxDV/HOST_D14
IO
NAND interface
59
PH12/ND_RE/ERxD3/HOST_D12
IO
NAND interface
60
PH10/ND_CE/ERxD2/HOST_D10
IO
NAND interface
Table 4-1: Connector description X1
Note 1)
Internally connected to 2.5V. If you want to program the OTP memory, just power this pin with 7.0V.
Note 2)
These IO pins are normally used to access more flash memory. They should not be used as general-
purpose IO pins.
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