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Access from the user program
KL5101
31
Version: 3.1
Feature bit no.
Description of the operation mode
Bit 0
0
• reserved, do not modify!
Bit 1
0/1
• 0: Counter inhibit with high-level at the gate input [0]
• 1: Counter inhibit with low-level at gate input
Bit 2, Bit 3
00
• Status input (active-low) is mapped into status byte 5 (ST.5) [00]
01
• reserved
10
• ST.5 = Status input, ST.6 = Status input
11
• ST.5 = Status input, ST.6 = !Status input
Bit 4 - Bit6
000
• External Latch function active [000]
001
• Period measurement active
010
…
111
• reserved
Bit 7 - Bit 9
0
• reserved, do not modify!
Bit 10, Bit 11
00
4-fold evaluation of the encoder signals A, B, C, i.e. both rising and falling edges of the encoder signals
A, B are counted. [00]
01
1-fold evaluation of the encoder signals A, B, C, i.e. each period of the encoder signal A is counted.
10
2-fold evaluation of the encoder signals A, B, C, i.e. each edge of the encoder signal A is counted.
11
4-fold evaluation of the encoder signals A, B, C
Bit 12 - Bit 14
0
• reserved, do not modify!
Bit 15
0/1
0: Encoder Interface [0]
1: Counter mode is active.
16-bit up/down counter
Input A: Counter
Input B: Counting direction (5 V or open = up, 0 V = down)
Input C: Latch
•
R33 - R47
Registers that depend on the terminal type.
•
R47 - R63
Extended registers with additional functions.
Содержание KL5101
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