4) While using external channels:
I) GPO_1
212
ASDATA3
InOut 4mA,
PD,SMT
1) Audio serial data 2 (Center/LFE)
2) DSD data right surround channel
3) Trap value in power-on reset:
I) 1: manufactory test mode
II) 0: normal operation
4) While only 2 channels output:
I) GPO_0
214
ASDATA4
INT1#
InOut 4mA,
PD,SMT
1) Audio serial data 3 (Center-back/
Center-left-back/Center-right-back, in 6.1 or 7.1 mode)
2) DSD data center channel
18) While only 2 channels output:
I) Digital video YUV output 6
II) GPIO
215
MC_DATA
INT2#
InOut 2mA,
PD,SMT
1) Microphone serial input
2) While not support Microphone:
I) Microcontroller external interrupt 2
II) GPIO
216
SPDIF
Output
4~16mA,
SR: ON/OFF
S/PDIF output
217
APLLVDD3
Power
3.3V Power pin for audio clock circuitry
218
APLLCAP
Analog inout
APLL External Capacitance connection
219
APLLVSS
Ground
Ground pin for audio clock circuitry
220
ADACVSS2
Ground
Ground pin for AUDIO DAC circuitry
221
ADACVSS1
Ground
Ground pin for AUDIO DAC circuitry
222
ARF
Output
1) AUDIO DAC Sub-woofer channel output
2) While internal AUDIO DAC not used: GPIO
223
ARS
GPIO
Output
1) AUDIO DAC Right Surround channel output
2) While internal AUDIO DAC not used:
a. SDATA3
b. GPIO
224
AR
GPIO
Output
1) AUDIO DAC Right channel output
2) While internal AUDIO DAC not used:
a. SDATA1
- 63 -
Содержание DV718SI
Страница 1: ...service manual DV718SI...
Страница 56: ...21 27M clock signal waveform diagram 22 Reset circuit waveform diagram URST Dv33 52...
Страница 92: ...5 1 3 Surface layer of DECODE SERVO Board 88...
Страница 93: ...5 1 4 Bottom layer of DECODE SERVO Board 89...
Страница 95: ...C744 C750 C745 C753 C738 C737 C739 C743 C742 C740 C747 5 1 6 Bottom layer of HDMI Board 91...