Baumuller BM4-O-IEI-01, Руководство по эксплуатации, Страница: 42 / 92

Registers of the IEI option module
Operating Instructions Option Module IEI for b maXX drive PLC BM4-O-IEI-01
Document No.: 5.02013.02
Baumüller Nürnberg GmbH
42
of 90
7.3
the rectangle incremental encoder. The system copies this internal register to counter
latch register 1 each time the BACI signal "Sync 1" occurs (this signal is latch condition
1; for more information on this topic, see also
Z Synchronizing the IEI option module
with the b maXX drive PLC – from page 51 onward).
m Probe mode
The number of signal edges of a 24 V signal are shown in counter latch register 1. If
the 24 V signal is activated and with this generates a signal edge, the system displays
in counter latch register 1 a value that is incremented (or decremented, depending on
the direction of counting) by 1.
The IEI option module uses an internal register to count the signal edges of a 24 V sig-
nal. The system copies this internal register to counter latch register 1 each time the
BACI signal "Sync 1" occurs (this signal is latch condition 1; for more information on
this topic, see also
Z Synchronizing the IEI option module with the b maXX drive PLC
– from page 51 onward).
If counter latch register 1 *.ud_COUNTER_LATCH1 is written with any value, the sys-
tem resets the display of bit 4 in the latch status register *.w_LATCH_STATUS_REG.
7.3.3 Counter latch register 2
This register only has a meaning in the IEI option module's encoder mode.
Counter latch register 2 *.ud_COUNTER_LATCH2 shows the value of the internal
counter at the instant of latch condition 2.
The difference between register *.ud_COUNTER_LATCH2 and register
*.ud_COUNTER_LATCH1 is proportional to the angle of rotation (or path) between
when latch condition 2 occurs and the last occurrence of BACI signal "Sync 1" (latch con-
dition 1).
If counter latch register 2 *.ud_COUNTER_LATCH2 is written with any value, the sys-
tem resets the display of bit 5 in the latch status register *.w_LATCH_STATUS_REG.
7.3.4 Counter latch register 3
This register only has a meaning in the IEI option module's encoder mode.
Counter latch register 3 *.ud_COUNTER_LATCH3 shows the counter value of the in-
ternal counter at the instant of latch condition 3.
The difference between register *.ud_COUNTER_LATCH3 and register
*.ud_COUNTER_LATCH1 is proportional to the angle of rotation (or path) between
when latch condition 3 occurs and the last occurrence of BACI signal "Sync 1" (latch con-
dition 1).
The difference between register *.ud_COUNTER_LATCH3 and register
*.ud_COUNTER_LATCH2 is proportional to the angle of rotation (or path) between
when latch condition 3 occurs and the occurrence of latch condition 2.
If counter latch register 3 *.ud_COUNTER_LATCH3 is written with any value, the sys-
tem resets the display of bit 6 in the latch status register *.w_LATCH_STATUS_REG.