Basler BE1-81O/U, Инструкция по эксплуатации

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9137300990 Rev J BE1-81O/U Functional Description 3-1
SECTION 3
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FUNCTIONAL DESCRIPTION
INTRODUCTION
The Digital Frequency Relay, BE1-81O/U, has one to four frequency setpoints for protecting an ac source
from underfrequency and overfrequency conditions within the limits of 40 to 70 hertz. When the BE1-
81O/U senses an underfrequency or overfrequency condition, an output relay energizes after a selectable
time delay. Relay operation is disabled if the sensed voltage decreases below an adjustable undervoltage
inhibit setting.
FUNCTIONAL DESCRIPTION
BE1-81O/U functions are illustrated in the block diagram of Figure 3-1 and described in the following
paragraphs.
Input Signal
Because input signal crossings are used to measure the input frequency, it is necessary to filter unwanted
harmonics and transients. Some attenuation of the input signal results. Figure 3-2 shows the attenuation,
in decibels, for input frequencies of 12 to 200 Hz.
A single-phase voltage is applied to an input signal conditioning circuit that consists of a transformer and
band-pass filter. The sensed input signal is applied to the zero-crossing logic and undervoltage detection
circuits.
Undervoltage Inhibit
This circuit prevents the output relays from energizing during an undervoltage condition associated with
equipment startup. The circuit prevents operation of the zero-cross logic and time delay logic, and lights
the Undervoltage Inhibit Indicator when the level of the sensed voltage decreases below the setting. A
potentiometer, accessed through the front panel, is used to adjust the undervoltage inhibit level from 40 to
120 Vac. BE1-81O/U relays are delivered with an undervoltage inhibit setting of 80 Vac.
Zero Crossing Logic
The zero crossing logic circuit converts the sensed frequency to pulses synchronized to each positive-
going zero crossing of the waveform. The pulse frequency represents the period of the waveform and is
applied to the period clock generator, minimum period difference logic, and maximum period difference
logic circuits.
Crystal Oscillator
The crystal-controlled oscillator provides accurate 1 MHz and 2 MHz timing signals for the clock logic.
Period Clock Generator
A frequency comparison is made for each cycle of sensed frequency. The period clock generator supplies
a reference signal that is synchronized with the beginning of each cycle of the sensed frequency. At each
zero crossing pulse, the clock gates the 2 MHz period clock pulses to the minimum period difference logic
circuit.
Minimum Period Difference Logic
Each zero-cross pulse causes this logic to count 24580 2 MHz clock pulses, which is the period of the 80
Hz maximum detectable frequency limit. When the sensed frequency is less than the limit, an end-of-
period reference (EOPR) pulse is generated to initiate the maximum period difference and measurement
logic.
However, if the sensed frequency equals or exceeds the 80 Hz maximum frequency limit (zero-cross
pulses interrupt the counts) for three consecutive cycles, the maximum period difference logic is
bypassed. The measured-frequency converter then computes the frequency at this maximum frequency
limit. The definite time delay is not affected by the frequency limit being exceeded.