30
BIOS SETUP
BIOS SETUP
BIOS
Set
u
p
CMOS Setup Utility - Copyright (C) 1984 - 1999 Award Software
Advanced chipset Features
DRAM Timing By SPD
: Disabled
Item Help
DRAM Clock
: 133MHz
SDRAM Cycle Length
: 3
Menu Level
!
Bank Interleave
: Disabled
Memory Hole
: Disabled
PCI Master Pipeline Req
: Enabled
P2C/C2P Concurency
: Enabled
Fast R-W Turn Around
: Disabled
AGP Driving Control
: Auto
AGP Driving Value
: DA
AGP Fast Write
: Disabled
On Chip USB
: Enabled
USB Keyboard Support
: Disabled
On Chip Sound
: Auto
On Chip Modem
: Auto
CPU to PCI Write Buffer
: Enabled
PCI Dynamic Bursting
: Enabled
PCI Master 0 WS Write
: Enabled
PCI Delay Transaction
: Enabled
"#$%
:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6:Fail-Safe Defaults F7:Optimized Defaults
System BIOS Cacheable
: Disabled
Video RAM Cacheable
: Disabled
AGP Aperture Size
: 64M
AGP - 4X Mode
: Disabled
PCI #2 Access #1 Retry
: Enabled
AGP Master 1 WS Write
: Disabled
AGP Master 1 WS Read
: Disabled
3.5
3.5
ADVANCED CHIPSET FEATURES
ADVANCED CHIPSET FEATURES