AXIOMTEK SBC8243, Руководство пользователя

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SBC8243 All-in-One Half-size CPU Card Series User’s Manual
Award BIOS Utility
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3*)3 !1&
NOTE:
ISA POST codes are typically output to port address
80h.
POST (hex) Description
01-02 Reserved
C0 Turn OFF OEM specific cache, shadow...
03
1. Initialize EISA registers (EISA BIOS only)
2. Initialize all the standard devices with default values
Standard devices includes:
-DMA controller (8237)
-Programmable Interrupt Controller (8259)
-Programmable Interval Timer (8254)
-RTC chip
04 Reserved
05
1. Keyboard Controller Self-Test
2. Enable Keyboard Interface
06 Reserved
07
Verifies CMOS basic R/W functionality
BE Program defaults values into chipset according to the
MODBINable Chipset Default Table
C1 Auto-detection of onboard DRAM & Cache
C5 Copy the BIOS from ROM into E0000-FFFFF shadow
RAM so that POST will go faster
08
Test the first 256K DRAM
09 1. Program the configuration register of Cyrix CPU
according to the MODBINable Cyrix Register Table
2. OEM specific cache initialization (if needed)
0A 1. Initialize the first 32 interrupt vectors with
corresponding Interrupt handlers Initialize INT no from
33-120 with Dummy(Spurious) Interrupt Handler
2. Issue CPUID instruction to identify CPU type
3. Early Power Management initialization (OEM specific)
Continued . . . . .