SBC8233 All-in-One 386SX CPU Card Series User's Manual
POST Error Codes
4$
Checkpoint Description
12
Checking for pressing of <INS> key during power-on done. Going to
disable DMA and interrupt controllers.
13
DMA controller #1, #2, interrupt controller #1, #2 disabled. Video
display is disabled and port-B is initialized. Chipset init about to
begin.
14
Chipset initialization over.
8254 timer test about to start.
19
8254 timer test over.
About to start memory refresh test.
1A
Memory Refresh line is toggling.
Going to check 15 micro second ON/OFF time.
20
Memory Refresh period 30 micro second test complete.
Base 64K test about to start.
23
Base 64K test passed.
Going to set BIOS stack and to do any setup before Interrupt vector
init.
24
Setup required before vector initialization complete.
Interrupt vector initialization about to begin.
25
Interrupt Vector initialization done.
Going to read input port of 9042 for turbo switch (if any) and to clear
password if post diag switch is on.
26
Input port of 8042 is read.
Going to initialize global data for turbo switch.
27
Global data initialization for turbo switch is over.
Any initialization before setting Video mode to be done next.
28
Initialization before setting Video mode is complete.
Going for monochrome mode and color mode setting.
2A
Different BUSes init (system, static, output devices) to start if present.
(Please see Reference for details of different BUSes)
2B
About to give control for any setup required before optional Video
ROM check.
2C
Processing before Video ROM control is done.
About to look for optional Video ROM and give control.
2D
Optional Video ROM control is done. About to give control to do any
processing after Video ROM returns control.
2E
Return from processing after the Video ROM control.
If EGA/VGA not found then do display memory R/W test.
Continued . . . . .
Содержание SBC8233
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