SBC8233 All-in-One 386SX CPU Card Series User's Manual
Hardware Description
"4
#3 ". .
Name Description
P0~P35
Flat panel data output
ENABKL
Activity Indicator and Enable Backlight outputs
SHFCLK
Shift clock. Pixel clock for flat panel data
M
M signal for panel AC drive control
LP
Latch pulse. Flat panel equivalent of HSYNC
FLM
First line marker. Flat panel equivalent of VSYNC
+12VM
+12V power controlled by chipset
ENAVEE
Power sequencing controls for panel LCD bias volt
VDDM
5V
(7
0&**2/&&
/
#(
;2,
#4F51)@"((621$$6
CONT9: FDD Connector Pin Assignment
Pin No.
Signal
Pin No.
Signal
1-33 (odd)
GND
20
Step Pulse
2
High Density
22
Write Data
4, 6
Unused
24
Write Enable
8
Index
26
Track 0
10
Motor Enable A
28
Write Protect
12
Driver Select B
30
Read Data
14
Driver Select A
32
Select Head
16
Motor Enable B
34
Disk Change
18
Direction
Содержание SBC8233
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