10
Single-Chip Applications
The 68HC11 is in Single-Chip mode with the EVBU boards' MODA jumper ON and MODB
jumper OFF. Single-Chip mode will make available all I/O ports including ports B and C for
your use.
You can program a small (512 byte) program into the 68HC11 internal EEPROM to be
executed in Single-Chip mode. Internal EEPROM is located from B600 - B7FF hex, which is
where your program must be located. See the Memory Map for more information.
To configure the CME11E9-EVBU board to start program execution at
address B600 whenever power or RESET is applied, you must connect a wire
between VCC and PE0, which can be accessed from the EVBU I/O Port (P4).
This will cause the Buffalo Monitor on-chip to jump to your program after
reset.
In Single-Chip mode you do not have external RAM available, so use internal
RAM to test your code first under the Buffalo Monitor. Locate your code
starting at address 100 hex for example to debug it from internal RAM.
When you're ready to program your application into the Internal EEPROM, change the
starting location of your code to address B600 hex. This should be the address of the first
instruction to be executed, not data or a subroutine. Also, make sure you add the stack
pointer initialization, as described in the previous "Programming External EEPROM" section.
You can use internal RAM for this also, 1FF for example (
LDS
#$1FF)
.
Re-Assemble or compile your code and Start the programming interface (AX11E for DOS or
AXIDE for windows). Choose "Program HC11 EEPROM" and follow the onscreen
instructions.
When finished programming, your application should start if the VCC to PE0 wire is installed.
You can re-program the internal EEPROM as often as you like.
To return to the on-chip Buffalo Monitor remove the VCC to PE0 wire and reset or re-apply
power to the board.
CAUTION
: When operating in Single-Chip mode, the memory control signals assume
different functions. If the PORTCL handshaking features (STRA and STRB) are used,
memory devices located in U5, U6 and U7 should be removed to prevent I/O line contention.
GND
VCC
SPARE
SPARE
VAL
PE3
PE2
PE1
PE0
PB1/A9