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Figure 7.  Turn-off and Turn-on Gate waveforms of Q1a and Q1b

Figure 6.  Input LED signal and Power MOSFET Gate Voltage Waveforms

Figure 6 also shows that, once a bootstrap supply is adopted, the amplitude of the output voltage at the top inverter arm 

will be slightly smaller than that of the bottom inverter arm, at 180

°

 out of phase.  (IN1+ is set at 49% duty ratio, while 

IN2+ (not shown) is also set with 49% duty ratio, plus a turn-on delay of 100 ns with respect to IN1+).
Figure 7 shows the turn-off signal of IN1+, the turn-off signal at gate of Q1a, and the turn-on signal at gate of Q1b. 

Output Measurement

A sample of input LED and various output waveforms are captured and shown in Figure 6.  The default setup connection 

is adopted, except with Q1a and Q1b power MOSFETs are mounted. The power MOSFETs used have a gate capacitance 

equivalent to 10 nF.

Содержание ACPL-P346

Страница 1: ...generate the bias current across D4 3 S2 and S3 jumpers are shorted by default to connect VE to VEE assuming that a negative supply is not needed Note If a negative supply is needed then S2 and S3 jum...

Страница 2: ...to simulate microcontroller output to drive the lower arm of the half bridge Inverter b Another 10 kHz 5V DC pulse at 180 out of phase to the signal in 4a from the dual output signal generator across...

Страница 3: ...212D R8 1 2 5 6 7 1 2 5 6 7 10 F Ta 10 F Ta TP2b TP3b TP4b TP1b TP2a TP3a TP4a TP1a S1a S2a S1b S2b CON1a CON1b IC1a IC1b IC2a IC2b R1a R2a R3a R4a R5a R6 C1a C2a C3a D1a D2a R1b R2b R3b R4b R5b C1b C...

Страница 4: ...CC2a is generated through the bootstrap components D3b and R6 6 Use a multi channel digital oscilloscope to capture the waveforms at the following points a LED signal at IN1 pin w r t GND for the bott...

Страница 5: ...CPL W346 ICs Therefore each board is enough to drive the top and the bottom arms of the half bridge inverter It allows the de signer to easily test the performance of a gate driver in an actual applic...

Страница 6: ...this scheme to work both the S2 and S3 jumpers must be open while the external supplies 15V 24V on the high voltage driver side are to be connected acrossVcc2 andVee pins only not the Ve pin As the ex...

Страница 7: ...ngle output DC DC converter for Vcc2a Only one external supply is needed Vcc1 5 5 V External DC DC Vcc1 12V 0V s c s c NM DC DC Vcc1 12V 0 V s c s c NM Higher Power Two single output DC DC converters...

Страница 8: ...of phase IN1 is set at 49 duty ratio while IN2 not shown is also set with 49 duty ratio plus a turn on delay of 100 ns with respect to IN1 Figure 7 shows the turn off signal of IN1 the turn off signa...

Страница 9: ...power MOSFET will be slow due to the capacitive effects of D2 and the gate capacitance of Q1 To improve the turn off speed the board is provided with a diode resis tor pair footprints at D1 and R5 not...

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