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4

Practical connections of the evaluation board using a power MOSFET for an actual inverter test

1.  Solder actual power MOSFETs at Q1 (or Q2) for the top and bottom arms of the half-bridge inverter isolated drivers.
2.  Connect a +5V DC isolated supply1 5V and GND terminals of CON1 for both arms of the isolated drivers.
3.  Connect another isolated DC supply2 (voltage range from 12 V ~ 20 V) across V

CC2a

 and V

EEa

 at pin 7 and pin 5 of IC2a 

respectively for the bottom arm.  

4.  Connect the signal output (meant to drive the bottom arm of the half-bridge inverter) from the microcontroller to 

Signal Input 1 across pin IN1+ and IN1- of CON1a of the bottom inverter arm isolated driver.

5.  Connect the signal output (meant to drive the top arm of the half-bridge inverter) from the microcontroller to Signal 

Input 2 across pin IN2+ and IN2- of CON1b of the top inverter arm isolated driver. Note: Signal Input 2 should be 

180

°

 out of phase w.r.t. Signal Input 1.  Check that V

CC2b

 (voltage close to V

CC2a

) is generated through the bootstrap 

components D3b and R6.

6.  Use a multi-channel digital oscilloscope to capture the waveforms at the following points:

a.  LED signal at IN1+ pin w.r.t. GND for the bottom arm.
b.  LED signal at IN2+ pin w.r.t. GND for the top arm.
c.  Vga for the gate driving voltage of Q1a (or Q2a) w.r.t. V

Ea

 of the bottom inverter arm (differential probe needed).

d.  Vgb for the gate driving voltage of Q1b (or Q2b) w.r.t. V

Eb

 of the top inverter arm (differential probe needed).

7.  Connect a power cable from the output pin (marked Load) to the inverter load.
8.  Connect the high voltage cables from the top arm power MOSFET drain pin to HVDC+ and from the bottom arm 

power MOSFET source pin to HVDC-, respectively, as shown. (Note: It is recommended that you enable the current-

limiting function of the HV power source supplying the high voltage DC bus voltage during this test to protect the 

inverter and its driver circuitries).

Microcontroller

IN1+
IN1- Signal Input 1

+5V

GND

DC Supply1

IN2+
IN2- Signal Input 2

 Power 

MOSFET

mounted

1

1

2

3

12~20 V

+

DC Supply2

4

5

12~20V

+

5

6a

6b

6c

6d

Load

7

HVDC+

HVDC

8

8

Power 

MOSFET

mounted

Figure 4. Connection of evaluation board in actual applications

Содержание ACPL-P346

Страница 1: ...generate the bias current across D4 3 S2 and S3 jumpers are shorted by default to connect VE to VEE assuming that a negative supply is not needed Note If a negative supply is needed then S2 and S3 jum...

Страница 2: ...to simulate microcontroller output to drive the lower arm of the half bridge Inverter b Another 10 kHz 5V DC pulse at 180 out of phase to the signal in 4a from the dual output signal generator across...

Страница 3: ...212D R8 1 2 5 6 7 1 2 5 6 7 10 F Ta 10 F Ta TP2b TP3b TP4b TP1b TP2a TP3a TP4a TP1a S1a S2a S1b S2b CON1a CON1b IC1a IC1b IC2a IC2b R1a R2a R3a R4a R5a R6 C1a C2a C3a D1a D2a R1b R2b R3b R4b R5b C1b C...

Страница 4: ...CC2a is generated through the bootstrap components D3b and R6 6 Use a multi channel digital oscilloscope to capture the waveforms at the following points a LED signal at IN1 pin w r t GND for the bott...

Страница 5: ...CPL W346 ICs Therefore each board is enough to drive the top and the bottom arms of the half bridge inverter It allows the de signer to easily test the performance of a gate driver in an actual applic...

Страница 6: ...this scheme to work both the S2 and S3 jumpers must be open while the external supplies 15V 24V on the high voltage driver side are to be connected acrossVcc2 andVee pins only not the Ve pin As the ex...

Страница 7: ...ngle output DC DC converter for Vcc2a Only one external supply is needed Vcc1 5 5 V External DC DC Vcc1 12V 0V s c s c NM DC DC Vcc1 12V 0 V s c s c NM Higher Power Two single output DC DC converters...

Страница 8: ...of phase IN1 is set at 49 duty ratio while IN2 not shown is also set with 49 duty ratio plus a turn on delay of 100 ns with respect to IN1 Figure 7 shows the turn off signal of IN1 the turn off signa...

Страница 9: ...power MOSFET will be slow due to the capacitive effects of D2 and the gate capacitance of Q1 To improve the turn off speed the board is provided with a diode resis tor pair footprints at D1 and R5 not...

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