AVR1612
5
8282A-AVR-11/10
PDI instruction usage example:
•
Write a 32-bit address into PDI Controller's pointer
Pseudo Directive:
ST ptr 0x12345678
PDIBUS hex code:
0x6B 0x12 0x34 0x56 0x78
NOTE
”0x6B” stands for “ST ptr” command.
•
Write a value to a address with *(ptr++) instruction through the PDI Controller
Pseudo Directive:
ST *(ptr++) 0xFF
PDIBUS hex code:
0x67 0xFF
NOTE
”0x67” stands for “ST *(ptr++)” command.
•
Write the repeat number into PDI Controller (REPEAT command uses
BIG_ENDIAN data)
Pseudo Directive:
REPEAT 0x1234
PDIBUS hex code:
0xA1 0x34 0x12
NOTE
”0xA1” stands for “REPEAT” command and 2 bytes data length.
•
Load data from PDIBUS Data Space using indirect addressing
Pseudo Directive:
LD *(ptr++)
PDIBUS hex code:
0x27
Then read the PDIBUS for the loading data.
NOTE
”0x27” stands for “LD *(ptr++)” command.
Please refer to “29.5.7 Instruction Set Summary” section of thfor more information.
2.5 NVM Commands
The NVM commands that can be used for accessing the NVM memories from
external programming are listed in
. This is a super-set of the commands
available for self-programming. Each command has to be loaded to the target NVM
CMD register using the PDI commands.
For external programming, the Trigger for Action Triggered Commands is to set the
CMDEX bit in the NVM CTRLA register (CMDEX). The Read Triggered Commands
are triggered by a direct or indirect Load instruction (LDS or LD) from the PDI (PDI
Read). The Write Triggered Commands is triggered by a direct or indirect Store
instruction (STS or ST) from the PDI (PDI Write).
Table 2-2.
NVM commands available for external programming.
CMD[6:0] Commands/Operation
Trigger
0x00 No
Operation
-
0x40 Chip
Erase
(1)
CMDEX
0x43
Read NVM
PDI Read
Flash Page Buffer
0x23
Load Flash Page Buffer
PDI Write
0x26
Erase Flash Page Buffer
CMDEX