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AVR Hardware Design Considerations [APPLICATION NOTE]   

Atmel-2521M-AVR-Hardware-Design-Considerations_ApplicationNote_092014 

 

3.1.1  Shared Use of SPI Programming Lines 

If additional devices are connected to the ISP lines, the programmer must be protected from any device, other 

than the AVR, that may try to drive the lines. This is especially important with the SPI bus, as it is similar to the 

ISP interface. Applying series resistors on the SPI lines, as depicted i

Figure 3-2

, is the easiest way to achieve 

this. 
 

The AVR will never drive the SPI lines in a programming situation, since the AVR is held in RESET to 

enter programming mode – and RESET’ing the AVR tri-states all pins. 

Figure 3-2. 

Connecting the SPI Lines to the ISP Interface 

 

 
Multiple Atmel AVR in a single application can share the same ISP interface to allow for programming of all the 

devices through a minimal interface. However, the AVR devices will all respond to the ISP instructions if special 

design considerations are not made. 
If it is desired to have only one ISP interface on the target board, the ISP programming can be designed so that 

only one of the AVR devices is provided with a SPI clock at a time. All other SPI lines can then be shared. This 

way, several AVRs can be located “behind” the same protection resistors, since they are all held in RESET while 

the ISP reset line is activated. The gating of the ISP clock can be accomplished by use of, e.g., jumpers or DIP 

switches. An alternate solution is to have multiple ISP interfaces, one for each device, all protected as shown in 

Figure 3-2

. 

3.2  JTAG Interface 

Some devices have a JTAG interface, which can be used for both programming and debugging. The JTAG lines 

are shared with analog input and should be connected so that the JTAG programmer can get control of the lines. 

Though JTAG programming tools such as the AVR JTAGICE mkII can drive a resistive load (refer to AVR Studio

®

 

help for details), capacitive load should in general be avoided. 

Figure 3-3

 shows the standard JTAG connector supplied with Atmel ISP programmers. Just as for the SPI 

programming connector, the target’s voltage supply is made available to allow for powering of the device or 

ensuring correct signal levels when programming. 

Содержание AVR042

Страница 1: ...on to potential design problems rather than being an exhaustive walk through of how to design applications using the AVR microcontrollers This document is thus a collection of information from existin...

Страница 2: ...SPI Programming Interface 6 3 1 1 Shared Use of SPI Programming Lines 7 3 2 JTAG Interface 7 3 2 1 Shared Use of JTAG Lines 8 3 3 PDI Interface 9 3 3 1 External Reset Circuitry 9 3 4 TPI Interface 10...

Страница 3: ...tor Figure 1 1 Incorrect Decoupling Figure 1 1 shows an example of insufficient decoupling The capacitor is placed too far away from the microcontroller creating a large high current loop The power an...

Страница 4: ...n the same manner as the digital supply voltage AREF must also be decoupled a typical value for the capacitor is 100nF If a separate analog ground AGND is present the analog ground should be separated...

Страница 5: ...since this is not internally provided due to High Voltage Programming Alternatively or in addition a Zener diode can be used to limit the RESET voltage relative to GND The Zener diode is highly recomm...

Страница 6: ...Tools help for further information on which interfaces are supported by the device and how to connect the programming tool 3 1 SPI Programming Interface On devices that use a Serial Peripheral Interfa...

Страница 7: ...d to have only one ISP interface on the target board the ISP programming can be designed so that only one of the AVR devices is provided with a SPI clock at a time All other SPI lines can then be shar...

Страница 8: ...inciple is shown in Figure 3 4 and is explained in further detail in the AVR Tools help file Figure 3 4 JTAG Daisy Chain Protection resistors as shown in Figure 3 2 are necessary if the JTAG lines are...

Страница 9: ...h Atmel programmers Only two pins on the device are needed for use of this interface RESET also called PDI_CLK and the dedicated PDI_DATA pin The target s voltage supply is made available to allow for...

Страница 10: ...e to the fact that the use of these clock sources is not well understood This section therefore treats the topic of using crystals and ceramic resonators in relation to Atmel AVR MCUs The description...

Страница 11: ...s refer to both devices Table 4 1 Style tt table title Ceramic Resonator Quartz Crystal Aging 3000ppm 10ppm Frequency tolerance 2000 5000ppm 20ppm Frequency temperature characteristics 20 50ppm C 0 5p...

Страница 12: ...symmetric layout so that CL1 CL2 C and CL1S CL2S CS then the external capacitors can be determined by Equation 4 2 CS can be estimated to be 5pF 10pF Equation 4 2 S L C C C 2 4 3 Recommended Capacito...

Страница 13: ...counter can through this feature be used for real time functions A 32 768kHz crystal should then be connected to the TOSCx pins of the AVR In some AVRs the internal oscillator circuit used with the re...

Страница 14: ...derations APPLICATION NOTE Atmel 2521M AVR Hardware Design Considerations_ApplicationNote_092014 14 Figure 5 1 A Basic Schematic of Required Recommended Connections for ATxmega32A4 B Copper PCB Layout...

Страница 15: ...AVR Hardware Design Considerations APPLICATION NOTE Atmel 2521M AVR Hardware Design Considerations_ApplicationNote_092014 15 B C...

Страница 16: ...AVR Hardware Design Considerations_ApplicationNote_092014 16 6 Revision History Doc Rev Date Comments 2521M 09 2014 Fixed some typos in Section 2 1 2521L 07 2013 Updated the diagram of Filters on JTA...

Страница 17: ...NESS INTERRUPTION OR LOSS OF INFORMATION ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES Atmel makes no representations or wa...

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