AT90S4414/8515
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Timer/Counter Prescaler
Figure 28 shows the general Timer/Counter prescaler.
Figure 28. Timer/Counter Prescaler
The four different prescaled selections are: CK/8, CK/64, CK/256 and CK/1024 where CK is the oscillator clock. For the two
Timer/Counters, added selections as CK, external source and stop, can be selected as clock sources.
8-bit Timer/Counter0
Figure 29 shows the block diagram for Timer/Counter0.
The 8-bit Timer/Counter0 can select clock source from CK, prescaled CK, or an external pin. In addition it can be stopped
as described in the specification for the Timer/Counter0 Control Register - TCCR0. The overflow status flag is found in the
Timer/Counter Insterrupt Flag Register - TIFR. Control signals are found in the Timer/Counter0 Control Register - TCCR0.
The interrupt enable/disable settings for Timer/Counter0 are found in the Timer/Counter Interrupt Mask Register - TIMSK.
When Timer/Counter0 is externally clocked, the external signal is synchronized with the oscillator frequency of the CPU. To
assure proper sampling of the external clock, the minimum time between two external clock transitions must be at least one
internal CPU clock period. The external clock signal is sampled on the rising edge of the internal CPU clock.
The 8-bit Timer/Counter0 features both a high resolution and a high accuracy usage with the lower prescaling opportuni-
ties. Similarly, the high prescaling opportunities make the Timer/Counter0 useful for lower speed functions or exact timing
functions with infrequent actions.
TCK1
TCK0
