Atmel AT91SAM9263-EK, Руководство пользователя

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Board Description
AT91SAM9263-EK Evaluation Board User Guide 3-5
6325D–ATARM–26-Aug-09
3.3 Memory
„ 16 Kbytes of Internal data cache
„ 16 Kbytes of Internal instruction cache
„ 128 Kbytes of Internal ROM
„ 80 Kbytes of Internal single-cycle access high-speed SRAM
„ 16 Kbytes of Internal single-cycle access high-speed SRAM
„ 8 Mbytes of Atmel NOR Flash (not populated)
„ 64 Mbytes of SDRAM memory
„ 4 Mbytes of PSRAM (EBI1)
„ 256 Mbytes of NANDFlash memory
„ Atmel TWI serial EEPROM
3.4 Clock Circuitry
„ 16.36766 MHz standard crystal for the embedded oscillator
„ 32.768 kHz standard crystal for the slow clock oscillator
3.5 Reset Circuitry
„ Internal reset controller with bi-directional reset pin
„ External reset pushbutton
3.6 Shutdown Controller
„ Programmable shutdown and Wake-Up
„ Wake-up push button
3.7 Power Supply Circuitry
„ For dynamic power consumption, the AT91SAM9263 consumes a maximum of 50 mA on VDDCORE
at maximum speed in typical conditions (1.2V, 25°C), processor running full-performance algorithm.
„ On-board 1.2V high efficiency step-down Charge Pump regulator with shutdown control
„ On-board 3.3V switching regulator with shutdown control
„ On-board 5V switching regulator with shutdown control
3.8 Remote Communication
„ One RS232 serial communication port
„ One serial CAN 2.0B communication port via 3-position printed circuit terminal block
„ One USB V2.0 Full-speed Compliant, 12 Mbits per second (UDP)
„ Two USB Host ports V2.0 Full-speed Compliant, 12 Mbits per second (UHP)
„ One RMII Ethernet 100-base TX with three status LEDs