20
LPC Header
This connector supports
(19-pin LPC1)
Trusted Platform Module (TPM)
(see p.8 No. 16)
system, which can securely
store keys, digital certificates,
passwords, and data. A TPM
system also helps enhance
network security, protects
digital identities, and ensures
platform integrity.
Backlight & Amp Volume Control
(7-pin BLT_VOL1)
(see p.8 No. 8)
Digital Input/Output Pin Header
(10-pin JGPIO1)
(see p.8 No. 22)
PIN
Signal
Name
PIN
Signal
Name
PIN
Signal
Name
PIN
Signal
Name
PIN Signal Name
2 SIO_GP30 4 SIO_GP31 6 SIO_GP32 8 SIO_GP33 10
GND
1 SIO_GP34 3 SIO_GP35 5 SIO_GP36 7 SIO_GP37 9
JGPIO_PWR
PIN
Signal Name
7
GND
6
GND
5
GPIO_BLT_DW
4
GPIO_BLT_UP
3
PWRDN
2
GPIO_VOL_DW
1
GPIO_VOL_UP
1
1
GND
GND
S_PWRDWN#
LAD2
SMB_CLK_MAIN
PCICLK
PCIRST#
LAD3
+3V
LAD0
GND
FRAME
SMB_DATA_MAIN
LAD1
SERIRQ#
GND
+3VSB
48MHz
+5V
BL1, BL2
(2-pin BL1)
(see p.8 No. 4)
(2-pin BL2)
(see p.8 No. 2)
Chassis Intrusion Headers
This motherboard supports
(2-pin CI1, CI2)
CASE OPEN detection feature
(see p.8 No. 21)
that detects if the chassis cover
has been removed. This feature
requires a chassis with chassis
intrusion detection design.
Buzzer Header
(2-pin BUZZ1)
(see p.8 No. 15)
1
+5V
SPKR
Parameter
Range
GPIO input Low voltage Max: 0.8V
GPIO input High voltage Low: 2V
GPIO output Low voltage Max: 0.4V
GPIO output High voltage Low: 2.4V
Note:
Max. load per GPI/O pin: 12mA
Current Max. 1A per power pin.
