iEPF-9010S-EY4 / iEPF-9012S-EY4
iEP-9010E / iEP-9012E
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English
5.3.3 Intel(R) Time Coordinated Computing
#AC Split Lock
Enable or Disable Alignment Check Exception (#AC). When enabled, this
will assert an #AC when any atomic operation has an operand that crisses
two cache lines.
#GP Split Lock
Enable or Disable GP Fault Exception (GP#). When enabled, this will as-
sert an GP# when encountering a Lock to un-cacheable memory before
the bus is locked.
IFU Enable
Enable or Disable Instruction Fetch Unit(IFU). When enabled, Instructions
will be prefetch to the cache.
Software SRAM
Enable or Disable Software SRAM. Enable will allocate 1 way of LLC; if
Cache Configuration subregion is available, it will allocate based on the
subregion.
Data Streams Optimizer
Enable or Disable Data Streams Optimizer (DSO). Enable will utilize DSO
Subregion to tune system. DSO settings supercede Intel(R) TCC Mode
settings that overlap between the two.
Error Log
Enable or Disable Error Log. Enable will record errors related to Intel(R)
TCC and save them to memory.
Inte(R) TCC Authentication Menu
Press Enter to configure Intel(R) TCC Authentication Menu options.
Inte(R) TCC Authentication
Intel(R) TCC Authentication determines the key to be used. OEM Enrolled
Key is built in by OEM. Non-OEM Enrolled Key can be add by user.
Содержание iEP-9010E
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