ASIC Bitmain Antminer S9K Скачать руководство пользователя страница 11

 

                                                                                      S9k S9SE Maintenance Guide 

 

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PCBA label diagram   

 

 

 

 

 

 

 

 

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Description of chip correspondence 

 

              

 

 

                                     

 
 

IV. Routine Maintenance Process 

Reference steps: 

 

  

1. Routine testing: First carry out visual inspection of the computing board to be repaired to see if there is displacement, deformation, burning of small 

cooling fin? If there is such phenomenon, it has to be processed first; if the small cooling fin is displaced, remove it first and then clear the black adhesive, 

and then re-adhesive after repair. 

  Secondly, after it’s confirmed no problem visual inspection, the impedance of each voltage domain can be detected first to detect whether there is a short 

circuit or an open circuit. If found, it must be handled first. 

  Next, check whether the voltages in each voltage domain reach 1.6v, and the voltage difference between the voltage domains must not exceed 0.3V. If the 

voltage in a voltage domain is too high or too low, the circuits in the adjacent voltage domain generally have abnormal phenomena, and it needs to find the 

reason first. 

2. After confirming there is no problem in the routine test (short circuit detection is necessary in routine test to avoid burning the chip or other materials due 

to short circuit when it’s power-on), a test box can be used for chip detection, and the detection results of the test box can be used to judge the location. 

3. According to the result of the test box detection, start from the vicinity of the faulty chip, and detect the voltage of the chip test point (CLK IN OUT/RI IN 

OUT/CO IN OUT/BO IN OUT/NRST IN OUT) and LDO 0V8 1V8. 

4. According to the signal flow direction, the RI signal is reversely transmitted (U60 to U1 chip), and several of the signals CLK CO BO NRST are 

transmitted forward (U1-U60), and an abnormal fault point is found through the power supply sequence. 

5. When locating to the faulty chip, the chip needs to be rewelded. The method is to add a flux around the chip (preferably no-clean flux), heat the solder 

joints of the chip pins to a dissolved state, gently move up and down, left and right, and press the chip; promote the chip pins to joint the bonding pad again, 

collect the tin, so as to tin again. If the fault is the same after re-welding, the chip can be replaced directly. 
6. After the repair of the computing board, the test box must be checked for more than twice. The time of the two tests: For the first time, after replacing the 

parts, the computing board needs to be cooled down; after passing the test, it is put aside first. For the second time, after the computing board is completely 

cooled after a few minutes, the test is performed. Although each of the two tests lasts only a few minutes, it does not affect the work. The repaired board is 

put aside, and the second board is repaired, after the second board is repaired, it is placed and cooled, then the first board is tested. In way, the repair is 

staggered and there is no delay in the total length of time. 
7. For the repaired board, first it is necessary to classify the faults and record the replaced part model, location, and cause, to feed back to production, after-

sales, research and development. 
8. After recording, install the whole machine for normal aging. 
  

 

 

 

 

 

 

 

 

Observe the 
appearance 

 

 

Measured 
impedance  

 

 

Measuring 
voltage  

 

 

Check each test 
point 

Voltage and 
power supply 

 

 

Jig 
Test 

 

 

According to 
the detection 
information 

Locate fault 

Locate the chip, 
reweld first, and 
replace if reweld is 
noneffective 

Record the 
fault type 

 

 

Repair is 
finished if it’s 
ok in two tests 

Conduct related aging 
after it’s ok 

 

 

Содержание Bitmain Antminer S9K

Страница 1: ...es of the single board test jig program III Principle and Structure 1 Principle overview 1 S9K S9SE computing board is composed of 6 voltage domains connected in series There are 10 BM1393 chips in ea...

Страница 2: ...chip domain distribution signal path and circuit distribution of the S9K S9SE signal board DC DC input IO J4 IO Block J4 Clamping circuit EEPROM EEPROM chip IC Domain voltage signal level shifting IC...

Страница 3: ...from chip U60 to chip U1 and then returns to the control board from the pin J4 8 at IO port when the IO signal is not inserted the voltage is 1 8V and the voltage is 1 8V when computing Signal BO BI...

Страница 4: ...2 Schematic diagram of DC to DC circuit 2 2 3 Schematic diagram of EEPROM IC single board test will change the magic number temperature sensing information and CRC information in the EEPROM 2 2 4 Sche...

Страница 5: ...S9k S9SE Maintenance Guide 5 2 2 5 Schematic diagram of PIC U102 2 2 6 Signal test points of each chip as shown below after amplified...

Страница 6: ...S9k S9SE Maintenance Guide 6 1 3 5 Signal test points in Domain 1 3 5 2 4 6 Signal test points in Domain 2 4 6 2 2 7 Pin circuit diagram of each chip in Domain 1 3 and 5 1 3 5 2 4 6...

Страница 7: ...S9k S9SE Maintenance Guide 7 2 2 8 Pin circuit diagram of each chip in Domain 2 4 and 6 2 2 9 Circuit diagram of J4 at IO port...

Страница 8: ...S9k S9SE Maintenance Guide 8 2 2 10 0 8V 1 8V circuit schematic diagram 2 2 11 Schematic diagram for Level signal conversion...

Страница 9: ...S9k S9SE Maintenance Guide 9 2 2 12 Schematic diagram for Y1 Y2 crystal oscillator 2 2 13 LDO 0 8V 1 8V and crystal oscillator measurement...

Страница 10: ...tage set by the test program of PIC jig and boosts as it works Then the jig outputs WORK and returns to noce after computing At this point the normal voltage of each test point should be CLKO 0 9V CO...

Страница 11: ...nd several of the signals CLK CO BO NRST are transmitted forward U1 U60 and an abnormal fault point is found through the power supply sequence 5 When locating to the faulty chip the chip needs to be r...

Страница 12: ...mple a chip itself can work but it will not forward other chip information at this time the entire signal chain will come to an abrupt end and lose a large part of it which is called broken chain The...

Страница 13: ...nt signal apart from the metal exposed at the contact end the other parts of the test lead must be sealed with a heat shrinkable tube so as to prevent the test lead from contacting with the cooling fi...

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