49
Ctrl-C
This command clears the operation in progress over remote interface and discards any
pending output data.
The SCPI Status Registers
All SCPI instruments implement status registers in the same way. The status system
records various instrument conditions in three register groups: the Status Byte register,
the Standard Event register, and the Questionable Status register group. The Status
Byte register records high-level summary information reported in the other register
groups. Chapter Five will illustrate how to use SCPI status registers.
What is an Event Register?
An event register is a read-only register that reports defined conditions within the
power supply. Bits in an event register are latched. Once an event bit is set,
subsequent state changes are ignored. Bits in an event register are automatically
cleared by a query command of that register (such as *ESR? Or STAT:QUES:EVEN?)
or by sending the *CLS command. A reset (*RST) or device clearance command will
not clear bits in event registers. Querying an event register returns a decimal value
which corresponds to the binary-weighted sum of all bits set in the register.
What is an Enable Register?
An enable register defines which bits in the corresponding event register are logically
ORed together to form a single summary bit. Enable registers are both readable and
writable. Querying an enable register will not clear it. The *CLS (clear status)
command does not clear enable registers but it does clear the bits in the event registers.
To enable bits in an enable register, you must write a decimal value which
corresponds to the binary-weighted sum of the bits you wish to enable in the register.
