ARM ARM710T, Руководство пользователя

Страница: 22 / 36

Configuring the ARM710T Header Card
3-2 © Copyright ARM Limited 1999. All rights reserved. ARM DUI 0114A
3.1 Setting the core clock frequency
On the ARM710T header card, a phase-locked loop performs the core clock generation.
The frequency and source of the core clock is determined by the settings of links LK4
and LK5. The positions of LK4 and LK5 are shown in Figure 3-1.
Figure 3-1 Position of links LK4 and LK5
The appropriate settings for the eight jumper links of LK4 and LK5 for a range of core
clock frequencies are shown in Table 3-1 on page 3-3.
GND
CLK
2X
EX
SEL0
SEL1
SEL2
nPD
LK5 LK4
GND
CLK
2X
EX
SEL0
SEL1
SEL2
nPD
LK5 LK4