FPGA Discovery-III XC3S200 Board Manual V1.0 (REV5, 9/3/2007)
9
4.1) PEB9QH39DEF7EIQ];]MEF
a) LED ^5]F_M
3MB870BJ2]>J/0123435068AaI;@A LED ISB8H8 8 3H6=d0 LED0|LED7 X3CJ?0VB=BXW3 (Cathode) 5691BH32D5;J?0VB
D0X837VMB9E/ I/O V06L^] FPGA @AJEHJMB84B8D//78J7H^12= R=470 X0T2@=d0 RNET3 D5; RNET4 J?008>91@0CF?7]dG0ISB9E3
91;D<3E61F:4AG 9 3E68Ea8WMB FPGA <?650I^9 }1~ @B4AGVBK3I;4SBKTM LED J^3<H?B6 VB I/O 4AGVE/ LED D5;VB I/O /B6VBV06=08
78=7J012 K3 D5; K4 J?0]?H69E80CF? (X:133FIB9JB1B64AG 1 ) 3E68Ea8TB9JM069B1KLM I/O V06 K3 D5; K4 J16<?H88AaT1d0[@?JM069B1
KLM LED 9U<B@B1WTE9JEHJMB84B8D//78J7H^12=4^a6[3M6?BC
1F:4AG 9 9B1J?0 LED 7VMB9E/VBJ?B6mV06 CPLD
b) 98=^5]F_MP`P=SP`KP6S9Q
JEHD<36Y57`7H87`97@8J2 (7-Segment) @A 4 T5E9=d0 DIGIT4 - DIGIT1 X3C4AG4>9T5E9I;KLM<BC<EccB\VM0@F51?H@9E8
DJ?<BCV06=BXW31?H@ (Common Common) V06DJ?5;T5E9I;DC9009IB99E8D<363E61F:4AG 10 9B1D<36Y54Ea6 4 T5E9]1M0@m9E8
I;KLM74=8^=9B1<D98 `_G6X3C4EGH[:JB=871BI;@06DC9[3M4AG:1;@B\ 25|30 =1Ea6J?0H^8B4A 3E68Ea8I_6JM06<D983MHC=HB@71UH[@?
8M0C9H?B 30 =1Ea6x4 T5E9 = 120 =1Ea6J?0H^8B4AI_6I;[@?7TU89B191;]1^/
78dG06IB9JEHD<36Y57:i8D//D=XW31?H@ 3E68Ea8TB9JM069B1KTM7`97@8J2K3J^3<H?B69UJM06<?650I^9}1~[:4AG<BC<EccB\
D5;50I^9 }0~ [:4AGVB COM V06T5E98Ea8]1M0@9E8 JEHJMB84B8 R1|R8 V8B3 100 X0T2@J?008>91@7]dG0ISB9E391;D< JEHD<36Y5
DIGIT2 D5; DIGIT1 WF9009D//KTMT@>895E/TEHX3CI>3(dp)V_a8[:0CF?3MB8/87]dG09B1D<367=1dG06T@BC : (Colon) 7]dG0D<36Y5
8Bx^9BT1d0D<367:i806{BK86B84AG79AGCH9E/0>\TtF@^ DJ?9B1D<36Y5JEH75VJ?B6mCE6=6KLM<BC<EccB\73ACH9E/<06JEHD19
1F:4AG 10 JEHD<36Y57`7H87`97@8J2 (7-Segment) ISB8H8 4 T5E9