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w-cost digital interface originated by Apple Computer as a desktop LAN and developed by the IEEE 1394
EEE 1394 can transport data at 100, 200 or 400 Mbps. One of the solutions to connect digital television
sts are sent to a
pecific address and an acknowledgment is returned. In addition to an architecture that scales with silicon technology, IEEE
annel interface. Isochronous data channels provide guaranteed data transport at a
rtant for time-critical multimedia data where just-in-time delivery eliminates the need
arity B
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de uses 1 parity bit for each byte, normally it is even parity mode, that is, each time the memory data is updated,
e adjusted to have even count "1" for each byte. When next time, if memory is read with odd number of "1", the
arity error is occurred and this is called single bit error detection.
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)
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For Socket 7 CPU, one burst data read requires four QWord (Quad-word, 4x16 = 64 bits). PBSRAM only needs one address
decoding time and automatically sends the remaining QWords to CPU according to a predefined sequence. Normally, it is
3-1-1-1, total 6 clocks, which is faster than asynchronous SRAM. PBSRAM is often used on L2 (level 2) cache of Socket 7 CPU.
Slot 1 and Socket 370 CPU do not need PBSRAM.
IEEE 1394 is a lo
working group. The I
devices together at 200 Mbps. Serial Bus Management provides overall configuration control of the serial bus in the form of
optimizing arbitration timing, guarantee of adequate electrical power for all devices on the bus, assignment of isochronous
channel ID, and notification of errors. There are two type of IEEE 1394 data transfer: asynchronous and isochronous.
Asynchronous transport is the traditional computer memory-mapped, load and store interface. Data reque
s
1394 features a unique isochronous data ch
pre-determined rate. This is especially impo
for costly buffering.
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arity B t
T e parity mo
parity bit will b
p