EVAL-SSM2306
Rev. 0 | Page 5 of 8
3.
Place the decoupling capacitors for the beads (C11 to C14
and C23 to C26) as close to the amplifier chip as possible,
and connect all their ground terminals together, as shown
in Figure 4. The same principle applies to the decoupling
capacitors for the inductors (C15 to C18) if inductors are
used in the application design. Ideally, solder their ground
terminals together; do not rely on PCB tracks or ground
planes to connect their ground terminals together.
4.
Place the first decoupling capacitor for the power supply
(C19) as close to the amplifier chip as possible, and connect
its ground terminal directly to the IC GND pins (Pin 13
and Pin 16), as shown in Figure 4.
5.
Place the other decoupling capacitor for the power supply
(C20) as close to the amplifier chip as possible, and connect
its ground terminal to the PCB ground area from which
the power supply traces come.
6.
Place the bead for the power supply (B5) as close to the
amplifier chip as possible, and keep it on the same side of
the PCB as the chip.
COPPER
FILL
SMALL
INDUCTOR
C24
C23
C19
C25
C26
C14
C13
B3
B4
C11
C12
B2
B1
OUTPUT
TRACK
INPUT
TRACK
06
85
6-
0
04
Figure 4. Placement and Routing of the Decoupling Capacitors
7.
The ferrite beads and their 1 nF decoupling capacitors can
block EMI up to 250 MHz. To eliminate EMI higher than
250 MHz, place a low value, small size capacitor, such as a
100 pF, 0402 size capacitor, in parallel with the decoupling
capacitors, C11, C12, C13, and C14. Place these small capa-
citors (C23, C24, C25, and C26) at least 20 mm away from
the 1 nF decoupling capacitors. Ideally, the ground terminals
of these small capacitors should be connected to the ground
terminals of the 1 nF decoupling capacitors or to the PCB
traces, which are placed as close to the output loads (the
loudspeakers) as possible. In this way, the PCB connecting
trace between these two capacitors serves as an inductor
for filtering out the high frequency component, as shown
in Figure 4.
8.
Decouple the input port nodes and the digital pins (Pin 3,
Pin 4, Pin 5, Pin 8, and Pin 9) with small capacitors, such
as 100 pF. These capacitors (C5, C6, C7, and C8) are not
required, but they can lower the EMI from these pins. The
ground terminals of these capacitors should be connected
as close to the chip ground as possible (see Figure 7).
9.
Ground the unconnected pins, Pin 6 and Pin 7.
10.
Connect the GND pins, Pin 13 and Pin 16, to the thermal
pad and place grounding vias, as shown in Figure 7, Figure 8,
and Figure 9.
11.
Use a solid polygon plane on the other side of the PCB for
the area of the vias that are placed on the thermal pad of
the chip. See Figure 10 or Figure 11. This polygon serves as
both the EMI shielding ground plane and the heat sink for
the SSM2306.
12.
Keep the PCB traces of high EMI nodes on the same side of
the PCB and as short as possible. The high EMI nodes on
the SSM2306 are Pin 1, Pin 2, Pin 11, and Pin 12.
13.
The incoming and outgoing PCB track connections to the
decoupling capacitors should not be connected to each
other. An example of a correct layout is shown in Figure 4.
An example of an incorrect layout is shown in Figure 5.
COPPER
FILL
SMALL
INDUCTOR
B1
B2
C12
C11
C24
C23
C19
C25
C26
C14
C13
B3
INPUT
TRACK
B4
06
85
6-
0
05
OUTPUT
TRACK
Figure 5. Incorrect Routing for the Output Decoupling Capacitors
The SSM2306 evaluation board works well only if these
techniques are implemented in the PCB design to keep EMI
and amplifier temperature low.
